IP Library › Granted Patent US 10,522,505
Granted Patent B2
US 10,522,505 · App. 15/918,906 · Granted Dec 31, 2019

Semiconductor device package and method for manufacturing the same

Inventors: Chih-Ming Hung (Kaohsiung, TW); Meng-Jen Wang (Kaohsiung, TW); Tsung-Yueh Tsai (Kaohsiung, TW); Jen-Kai Ou (Kaohsiung, TW)
Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.
H01L24/96H01L21/561H01L21/565H01L21/568H01L23/31H01L23/315H01L23/3107H01L23/3121H01L23/544H01L24/13H01L27/1469H01L27/14618H01L27/14634H01L27/14636G06K9/0004G06K9/00053H01L24/16H01L24/32H01L24/73H01L2223/54426H01L2223/54486H01L2224/13014H01L2224/1319H01L2224/13111H01L2224/13147H01L2224/13583H01L2224/13611H01L2224/13639H01L2224/13644H01L2224/13647H01L2224/13655H01L2224/16145H01L2224/16225H01L2224/16227H01L2224/32145H01L2224/32225H01L2224/73204H01L2224/95001H01L2924/014H01L2924/15321H01L2924/181H01L2924/19105
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Quick Facts
Patent No.
US 10,522,505
App. No.
15/918,906
Granted
Dec 31, 2019
Kind
B2
Abstract

A surface mount structure includes a substrate, a sensor, an electrical contact and a package body. The substrate has a first surface and a second surface opposite to the first surface. The sensor is disposed adjacent to the second surface of the substrate. The electrical contact is disposed on the first surface of the substrate. The package body covers the first surface and the second surface of the substrate, a portion of the sensor and a first portion of the electrical contact.

Claims (30)

1. A surface mount structure, comprising:

a substrate having a first surface and a second surface opposite to the first surface;

a sensor disposed adjacent to the second surface of the substrate;

an electrical contact disposed on the first surface of the substrate; and

a package body covering the first surface and the second surface of the substrate, a portion of the sensor, and a first portion of the electrical contact.

2. The surface mount structure of claim 1 , wherein

the sensor is disposed within the substrate; and

a surface of the sensor is exposed from the second surface of the substrate and covered by the package body.

3. The surface mount structure of claim 1 , wherein

the package body covering the first surface of the substrate has a first surface surrounding the electrical contact and a second surface separated from the electrical contact by the first surface; and

the first surface of the package body and the second surface of the package body are not coplanar.

4. The surface mount structure of claim 3 , wherein the first surface of the package body is closer to the substrate than is the second surface of the package body.

5. The surface mount structure of claim 3 , wherein the electrical contact comprises a second portion protruding from the first surface or the second surface of the package body.

6. The surface mount structure of claim 3 , wherein a recess is defined by the first surface of the package body, and is located between the electrical contact and the second surface of the package body.

7. The surface mount structure of claim 3 , wherein the first surface of the package body is in contact with a sidewall of the first portion of the electrical contact.

8. The surface mount structure of claim 3 , wherein

the package body defines an opening in which the first portion of the electrical contact is disposed; and

a width of at least a portion of the opening tapers towards the first surface of the package body.

9. The surface mount structure of claim 1 , wherein a greatest width of the electrical contact is included in the first portion of the electrical contact that is covered by the package body.

10. The surface mount structure of claim 1 , wherein a thickness of the package body above the first surface of the substrate is in a range from about 25 micrometers (μm) to about 100 μm.

11. The surface mount structure of claim 1 , wherein the electrical contact comprises a core and an outer layer covering the core.

12. The surface mount structure of claim 11 , wherein a melting point of the core is higher than a melting point of the outer layer.

13. The surface mount structure of claim 11 , wherein the core and the outer layer include tin or a tin alloy.

14. The surface mount structure of claim 11 , wherein the core includes copper and the outer layer includes tin or a tin alloy.

15. The surface mount structure of claim 11 , wherein the core comprises a barrier layer adjacent to the outer layer, and the barrier layer includes nickel or a nickel alloy.

16. The surface mount structure of claim 15 , wherein a thickness of the barrier layer is equal to or greater than about 2 μm.

17. The surface mount structure of claim 15 , wherein at least a portion of the barrier layer is disposed between the outer layer and the core.

18. The surface mount structure of claim 11 , wherein a thickness of the outer layer is in a range from about 2 μm to about 15 μm.

19. The surface mount structure of claim 1 , wherein the substrate has a lateral surface, and the package body covers the lateral surface of the substrate.

20. The surface mount structure of claim 1 , wherein the electrical contact comprises a second portion exposed from the package body, and wherein a height of the second portion of the electrical contact is less than a half of a total height of the electrical contact.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 6, 2018
From: HUNG, CHIH-MING; WANG, MENG-JEN; TSAI, TSUNG-YUEH; OU, JEN-KAI
To: ADVANCED SEMICONDUCTOR ENGINEERING, INC.
Reel/Frame 046287/0538 →
Continuity (2)
Provisional Application 62482431 · Apr 6, 2017
Related Publication 20180294247A1 · Oct 11, 2018
Cited By (1)
US 12,272,671