Granted Patent B2

US 10,554,227 · App. 15/589,332 · Granted Feb 4, 2020

Inventors: Eran Sharon (Rishon Lezion, IL); Alexander Bazarsky (Holon, IL); Ariel Navon (Revava, IL); Omer Fainzilber (Even-Yehuda, IL)

Assignee: Western Digital Technologies, Inc.

H03M13/458G11C29/52

Abstract

Claims (63)

1. A storage device comprising:

a controller configured to:

perform a convergence process to decode a data set, based on a memory error model, wherein:

the memory error model defines a reliability bin associated with an estimated reliability characteristic value, and

a portion of the data set is associated with the reliability bin;

before convergence for the data set is achieved:

update the memory error model to an updated memory model that defines an updated reliability bin that is associated with an updated estimated reliability characteristic value; and

generate an updated set of reliability metric values to decode the data set, wherein the updated set is based on the updated estimated reliability characteristic value; and

complete the convergence process using the updated set of reliability metric values.

2. The storage device of claim 1 , wherein the controller is further configured to:

pause the convergence process before the convergence is achieved; and

generate the updated set of reliability metric values while the convergence process is paused.

3. The storage device of claim 1 , wherein when the controller updates the memory error model to an updated memory model, the controller is further configured to:

generate a set of reliability metric values during a portion of the convergence process,

wherein:

the set of reliability metric values define magnitude components and sign components, and

the sign components correspond to hard bit representations of the data set;

calculate a set of estimated reliability characteristic values based on the magnitude components and sign components, wherein the set of estimated reliability characteristic values includes the estimated reliability characteristic value;

generate the updated set of reliability metric values based on the set of estimated reliability characteristic values; and

perform a second portion of the convergence process using the updated set of reliability metric values.

4. The storage device of claim 1 , wherein the updated set of reliability metric values comprises an updated set of a posteriori reliability metric values, wherein the controller is further configured to:

calculate an average of estimated reliability characteristic values for a plurality of reliability bins;

generate an updated set of a priori reliability metric values based on the average of estimated reliability characteristic values;

generate the updated set of a posteriori reliability metric values based on the updated set of a priori reliability metric values; and

perform a portion of the convergence process using the updated set of a posteriori reliability metric values.

5. The storage device of claim 4 , wherein the controller is further configured to:

generate a current set of a posteriori reliability metric values upon performing a current portion of the convergence process; and

generate the updated set of a posteriori reliability metric values based on the current set of a posteriori reliability metric values and the updated set of a priori reliability metric values.

6. The storage device of claim 5 , wherein the controller is further configured to generate the updated set of a posteriori reliability metric values based on a prior set of a priori reliability metric values.

7. The storage device of claim 1 , wherein the controller is further configured to:

determine a set of reliability bins based on bits of the data set being stored in good and bad storage locations; and

generate the updated set of reliability metric values based on the set of reliability bins.

8. The storage device of claim 1 , wherein the controller is further configured to:

determine a set of reliability bins based on a state of a neighboring or adjacent memory component; and

generate the updated set of reliability metric values based on the set of reliability bins.

9. A storage device comprising:

a controller configured to:

pause a convergence process after a portion of the convergence process is performed but before convergence is achieved;

calculate a set of reliability characteristic values associated with a memory error model, wherein the memory error model is based on a current set of reliability metric values generated from the portion of the convergence process and the memory error model defines reliability bins associated with respective reliability characteristic values of the current set of reliability characteristic values;

generate an updated set of reliability metric values based on the set of reliability characteristic values; and

resume the convergence process using the updated set of reliability metric values.

10. The storage device of claim 9 , wherein the controller is further configured to:

determine a number of iterations of the convergence process has reached or exceeded a threshold level; and in response,

pause the convergence process.

11. The storage device of claim 9 , wherein the controller is further configured to:

determine that a progress level of the convergence process is below a threshold, wherein the progress level is based on magnitude components of the set of reliability metric values; and in response,

pause the convergence process.

12. The storage device of claim 9 , wherein the controller is further configured to:

calculate the set of reliability characteristic values based on magnitude components of the current set of reliability metric values, wherein sign components of the current set of reliability metric values correspond to associated hard bit representations of a data set associated with the convergence process.

13. The storage device of claim 12 , wherein the current set of reliability metric values comprises a current set of a posteriori log likelihood ratio (LLR) values, wherein the updated set of reliability metric values comprises an updated set of a posteriori LLR values, and wherein the controller is further configured to:

while the convergence process is paused:

calculate expected, estimated bit error rates for the reliability bins based on the set of reliability characteristic values;

generate an updated set of a priori LLR values based on the expected, estimated bit error rates; and

generate the updated set of a posteriori LLR values based on the current set of a posteriori LLR values and the updated set of a priori LLR values.

14. The storage device of claim 13 , wherein the controller is further configured to generate the updated set of a posteriori LLR values based on a prior set of a priori LLR values.

15. A storage device comprising:

a controller having means for:

performing a convergence process to decode a data set, based on a memory error model, wherein:

the memory error model defines a reliability bin associated with an estimated reliability characteristic value, and

a portion of the data set is associated with the reliability bin;

updating the memory error model to an updated memory model that defines an updated reliability bin that is associated with an updated estimated reliability characteristic value;

generating an updated set of reliability metric values to decode the data set before convergence for the data set is achieved, wherein the updated set is based on the updated estimated reliability characteristic value; and

completing the convergence process using the updated set of reliability metric values.

Assignments (10)

Continuity (2)

Cited By (5)

US 12,242,345 US 12,326,805 US 12,380,020 US 12,399,814 US 12,441,804