IP Library › Granted Patent US 10,615,174
Granted Patent B2
US 10,615,174 · App. 16/435,280 · Granted Apr 7, 2020

Elevationally-extending strings of memory cells individually comprising a programmable charge storage transistor and methods of processing silicon nitride-comprising materials

Inventors: Fei Wang (Boise, ID); Tom J. John (Boise, ID); Kunal Shrotri (Boise, ID); Anish A. Khandekar (Boise, ID); Aaron R. Wilson (Boise, ID); John D. Hopkins (Meridian, ID); Derek F. Lundberg (Kuna, ID)
Assignee: Micron Technology, Inc.
H01L27/11582H01L21/0332H01L21/0337H01L21/31116H01L21/31144H01L27/11556H01L29/7883
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Quick Facts
Patent No.
US 10,615,174
App. No.
16/435,280
Granted
Apr 7, 2020
Kind
B2
Abstract

A method comprises forming material to be etched over a substrate. An etch mask comprising a silicon nitride-comprising region is formed elevationally over the material. The etch mask comprises an elevationally-extending mask opening in the silicon nitride-comprising region that has a minimum horizontal open dimension that is greater in an elevationally-innermost portion of the region than in an elevationally-outermost portion of the region. The elevationally-outermost portion has a greater etch rate in at least one of HF and H 3 PO 4 than does the elevationally-innermost portion. The etch mask is used as a mask while etching an elevationally-extending mask opening into the material. The silicon nitride-comprising region is exposed to at least one of HF and H 3 PO 4 to increase the minimum horizontal open dimension in the elevationally-outermost portion to a greater degree than increase, if any, in the minimum horizontal open dimension in the elevationally-innermost portion. Other aspects and embodiments, including structure independent of method of manufacture, are disclosed.

Claims (26)

1. An elevationally-extending string of memory cells individually comprising a programmable charge storage transistor, comprising:

vertically-alternating tiers of insulative material and control gate material;

a channel pillar extending elevationally through multiple of the vertically-alternating tiers and comprising a projecting portion extending elevationally outward of the elevationally-outermost tier of control gate material;

tunnel insulator, programmable charge storage material, and control gate blocking insulator between the channel pillar and the control gate material of individual of the tiers of the control gate material; and

silicon nitride-comprising material encircling at least some of the projecting portion of the channel pillar, the encircling silicon nitride-comprising material comprising an elevationally-outermost portion and an elevationally-innermost portion, the elevationally-outermost portion having greater intrinsic mechanical stress in the tensile direction than does the elevationally-innermost portion, the elevationally-outermost portion and the elevationally-innermost portion being directly against one another and difference in said intrinsic mechanical stress being along a stepped gradient.

2. The string of memory cells of claim 1 wherein said intrinsic mechanical stress is constant elevationally through each of the elevationally-outermost portion and the elevationally-innermost portion.

3. The string of memory cells of claim 1 wherein the elevationally-outermost portion has intrinsic tensile mechanical stress.

4. The string of memory cells of claim 3 wherein the elevationally-innermost portion has intrinsic tensile mechanical stress.

5. An elevationally-extending string of memory cells individually comprising a programmable charge storage transistor, comprising:

vertically-alternating tiers of insulative material and control gate material;

a channel pillar extending elevationally through multiple of the vertically-alternating tiers and comprising a projecting portion extending elevationally outward of the elevationally-outermost tier of control gate material;

tunnel insulator, programmable charge storage material, and control gate blocking insulator between the channel pillar and the control gate material of individual of the tiers of the control gate material; and

silicon nitride-comprising material encircling at least some of the projecting portion of the channel pillar, the encircling silicon nitride-comprising material comprising an elevationally-innermost portion comprising carbon, the encircling silicon nitride-comprising material comprising an elevationally-outermost portion having less carbon content, if any, than the elevationally-innermost portion, the elevationally-outermost portion and the elevationally-innermost portion being directly against one another and difference in said carbon content being along a stepped gradient.

6. The string of memory cells of claim 5 wherein said carbon content is constant elevationally through each of the elevationally-outermost portion and the elevationally-innermost portion.

7. The string of memory cells of claim 5 wherein the elevationally-innermost portion has 0.5 to 9 atomic percent carbon.

8. The string of memory cells of claim 7 wherein the elevationally-innermost portion has 0.5 to 2 atomic percent carbon.

9. The string of memory cells of claim 5 wherein the elevationally-outermost portion has zero to 0.001 atomic percent carbon.

10. An elevationally-extending string of memory cells individually comprising a programmable charge storage transistor, comprising:

vertically-alternating tiers of insulative material and control gate material;

a channel pillar extending elevationally through multiple of the vertically-alternating tiers and comprising a projecting portion extending elevationally outward of the elevationally-outermost tier of control gate material;

tunnel insulator, programmable charge storage material, and control gate blocking insulator between the channel pillar and the control gate material of individual of the tiers of the control gate material; and

silicon nitride-comprising material encircling at least some of the projecting portion of the channel pillar, the encircling silicon nitride-comprising material comprising an elevationally-outermost portion and an elevationally-innermost portion, the elevationally-outermost portion comprising at least two of (a), (b), and (c), where,

(a) greater intrinsic mechanical stress in the tensile direction than the elevationally-innermost portion;

(b) less carbon content, if any, than the elevationally-innermost portion; and

(c) more boron content than in the elevationally-innermost portion, if any in the elevationally-innermost portion.

11. The string of memory cells of claim 10 wherein the elevationally-outermost portion comprises all of (a), (b), and (c).

Continuity (4)
Continuation 16041388 · Jul 20, 2018
Continuation 15851532 · Dec 21, 2017
Division 15293133 · Oct 13, 2016
Related Publication 20190312056A1 · Oct 10, 2019