Comparator circuit, A/D conversion circuit, and display apparatus
A comparator circuit according to the present disclosure includes a first switch section that selectively takes in a signal voltage, a second switch section that selectively takes in a control waveform, a differential amplifier including a non-inverted input end connected to each of output ends of the first switch section and the second switch section, a capacity section including one end connected to an inverted input end of the differential amplifier and the other end supplied with a reference voltage, and a third switch section that selectively short-circuits the inverted input end and an output end of the differential amplifier.
1. A comparator circuit, comprising:
a first switch section;
a second switch section configured to selectively receive a control waveform that has a voltage variation of a sawtooth waveform;
a capacity section that includes a first end and a second end, wherein the first end of the capacity section is connected to each of an output end of the first switch section and an output end of the second switch section;
a differential amplifier that includes:
an inverted input end connected to the second end of the capacity section, and
a non-inverted input end supplied with a reference voltage; and
a third switch section configured to selectively short-circuit the inverted input end and an output end of the differential amplifier.
2. The comparator circuit according to claim 1 , wherein the reference voltage is a fixed voltage.
3. The comparator circuit according to claim 1 , wherein
each of the first switch section and the third switch section is driven by a first switch control pulse that has a first phase, and
the second switch section is driven by a second switch control pulse that has a second phase opposite to the first phase.
4. The comparator circuit according to claim 1 , further comprising a current supply section connected to the output end of the differential amplifier, wherein
the current supply section is configured to supply current based on an output of the differential amplifier,
the reference voltage is independent of a power-supply section and a ground section, and
the ground section corresponds to the current supply section.
5. The comparator circuit according to claim 1 , wherein the first switch section is configured to selectively receive a signal voltage.
6. The comparator circuit according to claim 1 , wherein the comparator circuit is an Analog/Digital (A/D) conversion circuit.
7. A comparator circuit, comprising:
a first switch section;
a second switch section configured to selectively receive a control waveform that has a voltage variation of a sawtooth waveform;
a differential amplifier that includes a non-inverted input end and an inverted input end, wherein the non-inverted input end is connected to each of an output end of the first switch section and an output end of the second switch section;
a capacity section that includes a first end connected to the inverted input end of the differential amplifier, and a second end supplied with a reference voltage; and
a third switch section configured to selectively short-circuit the inverted input end and an output end of the differential amplifier.
8. The comparator circuit according to claim 7 , wherein the reference voltage is a fixed voltage.
9. The comparator circuit according to claim 7 , wherein
each of the first switch section and the third switch section is driven by a first switch control pulse that has a first phase, and
the second switch section is driven by a second switch control pulse that has a second phase opposite to the first phase.
10. The comparator circuit according to claim 7 , further comprising a current supply section connected to the output end of the differential amplifier, wherein
the current supply section is configured to supply current based on an output of the differential amplifier,
the reference voltage is independent of a power-supply section and a ground section, and
the ground section corresponds to the current supply section.
11. The comparator circuit according to claim 7 , wherein the first switch section is configured to selectively receive a signal voltage.