IP Library › Granted Patent US 10,629,531

Granted Patent B2

US 10,629,531 · App. 15/905,216 · Granted Apr 21, 2020

Semiconductor device and method of fabricating 3D package with short cycle time and high yield

Inventor: Yaojian Lin (Jiangyin, CN)

H01L23/528 H01L21/6835 H01L21/6836 H01L21/76895 H01L21/78 H01L22/14 H01L22/20 H01L23/3107 H01L23/49811 H01L23/49822 H01L23/49827 H01L23/5389 H01L24/96 H01L24/97 H01L25/16 H01L25/50 H01L21/561 H01L23/49816 H01L23/544 H01L24/81 H01L24/83 H01L2221/68327 H01L2221/68331 H01L2221/68359 H01L2221/68372 H01L2221/68381 H01L2223/54433 H01L2223/54486 H01L2224/03334 H01L2224/04105 H01L2224/11 H01L2224/12105 H01L2224/19 H01L2224/32225 H01L2224/73253 H01L2224/73267 H01L2224/81005 H01L2224/81191 H01L2224/81192 H01L2224/81815 H01L2224/83005 H01L2224/94 H01L2224/96 H01L2224/97 H01L2924/15311 H01L2924/19104 H01L2924/19105 H01L2924/19106 H01L2924/3511 H01L2924/37001

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Quick Facts

Patent No.: US 10,629,531
App. No.: 15/905,216
Granted: Apr 21, 2020
Kind: B2

External Links

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Abstract

A method of making a semiconductor device comprising the steps of providing a first manufacturing line, providing a second manufacturing line, and forming a first redistribution interconnect structure using the first manufacturing line while forming a second redistribution interconnect structure using the second manufacturing line. The method further includes the steps of testing a first unit of the first redistribution interconnect structure to determine a first known good unit (KGU), disposing a known good semiconductor die (KGD) over the first KGU of the first redistribution interconnect structure, and dicing the first KGU and KGD from the first redistribution interconnect structure. The method further includes the steps of testing a unit of the second redistribution interconnect structure to determine a second KGU of the second redistribution interconnect structure and disposing first KGU of the first redistribution interconnect structure and the KGD over the second KGU of the second redistribution interconnect structure.

Claims (61)

1. A method of making a semiconductor device, comprising:

forming a first build-up interconnect structure over a first carrier;

forming a second build-up interconnect structure over a second carrier;

disposing a semiconductor die over the first build-up interconnect structure;

depositing a first encapsulant over the semiconductor die and first build-up interconnect structure;

singulating the first build-up interconnect structure after disposing the semiconductor die over the first build-up interconnect structure and depositing the first encapsulant; and

disposing the semiconductor die and first build-up interconnect structure over the second build-up interconnect structure and second carrier after singulating the first build-up interconnect structure.

2. The method of claim 1 , further including:

forming the first build-up interconnect structure using a first manufacturing equipment; and

forming the second build-up interconnect structure using a second manufacturing equipment, wherein a resolution of the first manufacturing equipment is different from a resolution of the second manufacturing equipment.

3. The method of claim 1 , further including disposing a conductive bump over the first build-up interconnect structure prior to disposing the semiconductor die and first build-up interconnect structure over the second build-up interconnect structure.

4. The method of claim 3 , further including bonding the conductive bump to the second build-up interconnect structure.

5. The method of claim 1 , further including:

disposing an interposer on the first build-up interconnect structure adjacent to the semiconductor die; and

depositing the first encapsulant over the interposer.

6. The method of claim 1 , further including:

depositing a second encapsulant over the first build-up interconnect structure and second build-up interconnect structure; and

removing a portion of the second encapsulant to expose the first build-up interconnect structure.

7. A method of making a semiconductor device, comprising:

forming a first build-up interconnect structure over a first carrier;

forming a second build-up interconnect structure over a second carrier;

disposing a semiconductor die over the first build-up interconnect structure;

singulating the first build-up interconnect structure after disposing the semiconductor die over the first build-up interconnect structure; and

disposing the semiconductor die and first build-up interconnect structure over the second build-up interconnect structure and second carrier.

8. The method of claim 7 , further including removing the first carrier after disposing the semiconductor die and first build-up interconnect structure over the second build-up interconnect structure and second carrier.

9. The method of claim 7 , further including removing the second carrier after disposing the semiconductor die and first build-up interconnect structure over the second build-up interconnect structure and second carrier.

10. The method of claim 7 , further including disposing a first encapsulant between the first build-up interconnect structure and second build-up interconnect structure.

11. The method of claim 10 , further including depositing a second encapsulant over the first build-up interconnect structure and second build-up interconnect structure.

12. The method of claim 7 , further including disposing a discrete passive device over a conductive layer of the second build-up interconnect structure.

13. The method of claim 7 , further including:

forming the first build-up interconnect structure using a first manufacturing equipment; and

14. A method of making a semiconductor device, comprising:

forming a first build-up interconnect structure over a first carrier;

forming a second build-up interconnect structure over a second carrier;

disposing a semiconductor die over the first build-up interconnect structure; and

disposing the semiconductor die and first build-up interconnect structure over the second build-up interconnect structure and second carrier.

15. The method of claim 14 , further including:

testing a first unit of the first build-up interconnect structure to determine a known good unit (KGU);

testing the semiconductor die to determine a known good semiconductor die (KGD); and

disposing the KGD over the KGU of the first build-up interconnect structure.

16. The method of claim 15 , further including bonding a conductive bump to the second build-up interconnect structure.

17. The method of claim 16 , further including disposing the conductive bump over the first build-up interconnect structure prior to disposing the semiconductor die and first build-up interconnect structure over the second build-up interconnect structure.

18. The method of claim 14 , further including removing the first carrier after disposing the semiconductor die and first build-up interconnect structure over the second build-up interconnect structure and second carrier.

19. The method of claim 14 , further including disposing a discrete passive device over a conductive layer of the second build-up interconnect structure.

20. A method of making a semiconductor device, comprising:

forming a first build-up interconnect structure on a carrier;

forming a second build-up interconnect structure;

disposing a semiconductor die over the first build-up interconnect structure;

disposing the semiconductor die and first build-up interconnect structure over the second build-up interconnect structure; and

removing the carrier after disposing the semiconductor die and first build-up interconnect structure over the second build-up interconnect structure.

21. The method of claim 20 , further including:

testing a unit of the first build-up interconnect structure to determine a rejected unit; and

disposing a dummy die over the rejected unit of the first build-up interconnect structure.

22. The method of claim 20 , further including disposing a discrete passive device over the second build-up interconnect structure.

23. The method of claim 20 , further including:

forming the first build-up interconnect structure using a first manufacturing equipment; and

forming the second build-up interconnect structure using a second manufacturing equipment, wherein the second manufacturing equipment includes a resolution greater than a resolution of the first manufacturing equipment.

24. The method of claim 20 , further including:

depositing an encapsulant over the first build-up interconnect structure and second build-up interconnect structure; and

backgrinding the encapsulant to expose the first build-up interconnect structure.

Continuity (4)

Continuation 14971627 · Dec 16, 2015

Continuation In Part 14887561 · Oct 20, 2015

Provisional Application 62068499 · Oct 24, 2014

Related Publication 20180190581A1 · Jul 5, 2018

Cited By (1)

US 12,616,048