Vertically stacked complementary-FET device with independent gate control
A device is disclosed that includes a first transistor device of a first type and a second transistor device of a second type positioned vertically above the first transistor, wherein the first type and second type of transistors are opposite types. The device also includes a gate structure for the first transistor and the second transistor, wherein the gate structure comprises a first gate electrode for the first transistor and a second gate electrode for the second transistor and a gate stack spacer positioned vertically between the first gate electrode and the second gate electrode so as to electrically isolate the first gate electrode from the second gate electrode.
1. A device, comprising:
a first transistor device of a first type;
a second transistor device of a second type positioned vertically above the first transistor device, wherein the first type and second type of transistors are opposite types;
a gate structure for the first transistor and the second transistor, wherein the gate structure comprises a first gate electrode for the first transistor and a second gate electrode for the second transistor;
a gate stack spacer positioned vertically between the first gate electrode and the second gate electrode so as to electrically isolate the first gate electrode from the second gate electrode;
a first channel semiconductor material for the first transistor device, wherein the first gate electrode is positioned around at least portions of the first channel semiconductor material; and
a second channel semiconductor material for the second transistor device, wherein the second gate electrode is positioned around at least portions of the second channel semiconductor material.
2. The device of claim 1 , wherein the first transistor is a P-type transistor and the second transistor is an N-type transistor.
3. The device of claim 1 , wherein the first gate electrode comprises a first conductive material and the second gate electrode comprises a second conductive material, wherein the first conductive material is different from the second conductive material.
4. The device of claim 3 , wherein the first conductive material comprises TiN and the second conductive material comprises a plurality of layers of conductive material.
5. The device of claim 4 , wherein the plurality of layers of conductive material comprise TiN, TiC and TiN.
6. The device of claim 3 , wherein the first conductive material comprises a first work-function material and the second conductive material comprises a second work-function material.
7. The device of claim 1 , wherein the gate structure further comprises a third conductive material that is conductively coupled to the first gate electrode and to the second gate electrode.
8. The device of claim 7 , wherein the third conductive material comprises tungsten.
9. The device of claim 1 , wherein the gate structure further comprises a third conductive material, the third conductive material comprising first and second portions that are electrically isolated from one another, wherein the first portion of the third conductive material is conductively coupled to the first gate electrode and the second portion of the third conductive material is conductively coupled to the second gate electrode.
10. The device of claim 1 , wherein the first channel semiconductor material and the second channel semiconductor material comprise a same semiconductor material.
11. A device, comprising:
a first transistor device of a first type;
a second transistor device of a second type positioned vertically above the first transistor device, wherein the first type and second type of transistors are opposite types;
a first channel semiconductor material for the first transistor device
a second channel semiconductor material for the second transistor device, wherein the first channel semiconductor material and the second channel semiconductor material comprise a same semiconductor material;
a gate structure for the first transistor and the second transistor, wherein the gate structure comprises a first gate electrode for the first transistor and a second gate electrode for the second transistor, wherein the first gate electrode is positioned around at least portions of the first channel semiconductor material, the second gate electrode is positioned around at least portions of the second channel semiconductor material and wherein the first gate electrode and the second gate electrode comprise different materials, and
a gate stack spacer positioned vertically between the first gate electrode and the second gate electrode so as to electrically isolate the first gate electrode from the second gate electrode.
12. The device of claim 11 , wherein the first transistor is an N-type transistor and the second transistor is a P-type transistor.
13. The device of claim 11 , wherein the first gate electrode comprises a first conductive material and the second gate electrode comprises a second conductive material, wherein the first conductive material is different from the second conductive material.
14. The device of claim 13 , wherein the first conductive material comprises a plurality of layers of conductive material and the second conductive material comprises TiN.
15. The device of claim 13 , wherein the first conductive material comprises a first work-function material and the second conductive material comprises a second work-function material.
16. The device of claim 12 , wherein the gate structure further comprises a third conductive material that is conductively coupled to the first gate electrode and to the second gate electrode.
17. The device of claim 12 , wherein the gate structure further comprises a third conductive material, the third conductive material comprising first and second portions that are electrically isolated from one another, wherein the first portion of the third conductive material is conductively coupled to the first gate electrode and the second portion of the third conductive material is conductively coupled to the second gate electrode.
18. A device, comprising:
a first transistor device of a first type;
a second transistor device of a second type positioned vertically above the first transistor device, wherein the first type and second type of transistors are opposite types;
a first channel semiconductor material for the first transistor device;
a second channel semiconductor material for the second transistor device;
a gate structure for the first transistor and the second transistor, wherein the gate structure comprises a first gate electrode for the first transistor and a second gate electrode for the second transistor, wherein the first gate electrode is positioned around at least portions of the first channel semiconductor material, the second gate electrode is positioned around at least portions of the second channel semiconductor material and wherein the first gate electrode and the second gate electrode comprise different materials, and
a gate stack spacer positioned vertically between the first gate electrode and the second gate electrode so as to electrically isolate the first gate electrode from the second gate electrode.
19. The device of claim 18 , wherein the first gate electrode comprise a first work-function material and the second gate electrode comprises a second work-function material, wherein the first work-function material and the second work-function material comprise different materials.