IP Library Granted Patent US 10,833,203
Granted Patent B2
US 10,833,203 · App. 16/789,474 · Granted Nov 10, 2020

Transistor and semiconductor device

Inventors: Shunpei Yamazaki (Tokyo, JP); Masayuki Sakakura (Kanagawa, JP)
Assignee: Semiconductor Energy Laboratory Co., Ltd.
H01L29/78693H01L27/0688H01L27/092H01L27/1225H01L29/045H01L29/105H01L29/41733H01L29/42384H01L29/78648H01L29/78696H01L21/823807H01L2029/42388
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Quick Facts
Patent No.
US 10,833,203
App. No.
16/789,474
Granted
Nov 10, 2020
Kind
B2
Abstract

A transistor with small parasitic capacitance can be provided. A transistor with high frequency characteristics can be provided. A semiconductor device including the transistor can be provided. Provided is a transistor including an oxide semiconductor, a first conductor, a second conductor, a third conductor, a first insulator, and a second insulator. The first conductor has a first region where the first conductor overlaps with the oxide semiconductor with the first insulator positioned therebetween; a second region where the first conductor overlaps with the second conductor with the first and second insulators positioned therebetween; and a third region where the first conductor overlaps with the third conductor with the first and second insulators positioned therebetween. The oxide semiconductor including a fourth region where the oxide semiconductor is in contact with the second conductor; and a fifth region where the oxide semiconductor is in contact with the third conductor.

Claims (45)

1. A semiconductor device comprising:

a transistor, the transistor comprising:

a first oxide semiconductor layer;

a second oxide semiconductor layer over the first oxide semiconductor layer;

a first insulating layer over the second oxide semiconductor layer, the first insulating layer comprising an opening;

a gate electrode, a first part of the gate electrode provided in the opening; and

a gate insulating layer located between the second oxide semiconductor layer and the gate electrode,

wherein in a cross section parallel to a channel length direction of the transistor, a first width of the opening is smaller than a first width of the first oxide semiconductor layer,

wherein in a cross section parallel to a channel width direction of the transistor, a second width of the opening is larger than a second width of the first oxide semiconductor layer,

wherein a second part of the gate electrode does not overlap with the first oxide semiconductor layer and the second oxide semiconductor layer, and

wherein in the cross section parallel to the channel width direction of the transistor, a bottom surface of the second part of the gate electrode is located below a bottom surface of the first oxide semiconductor layer.

2. The semiconductor device according to claim 1 , wherein the first oxide semiconductor layer is an island-shaped oxide semiconductor layer.

3. The semiconductor device according to claim 1 , wherein the first oxide semiconductor layer comprises indium.

4. The semiconductor device according to claim 1 , wherein each of the first oxide semiconductor layer and the second oxide semiconductor layer comprises In-M-Zn oxide.

5. The semiconductor device according to claim 4 , wherein M is selected from the group consisting of aluminum, gallium, yttrium, and tin.

6. A semiconductor device comprising:

a transistor, the transistor comprising:

a first oxide semiconductor layer;

a second oxide semiconductor layer over the first oxide semiconductor layer;

a first insulating layer over the second oxide semiconductor layer, the first insulating layer comprising an opening;

a gate electrode, a first part of the gate electrode provided in the opening;

a gate insulating layer located between the second oxide semiconductor layer and the gate electrode; and

a third oxide semiconductor layer located between the second oxide semiconductor layer and the gate insulating layer,

wherein in a cross section parallel to a channel length direction of the transistor, a first width of the opening is smaller than a first width of the first oxide semiconductor layer,

wherein in a cross section parallel to a channel width direction of the transistor, a second width of the opening is larger than a second width of the first oxide semiconductor layer,

wherein a second part of the gate electrode does not overlap with the first oxide semiconductor layer and the second oxide semiconductor layer, and

wherein in the cross section parallel to the channel width direction of the transistor, a bottom surface of the second part of the gate electrode is located below a bottom surface of the first oxide semiconductor layer.

7. The semiconductor device according to claim 6 , wherein the first oxide semiconductor layer is an island-shaped oxide semiconductor layer.

8. The semiconductor device according to claim 6 , wherein the first oxide semiconductor layer comprises indium.

9. The semiconductor device according to claim 6 , wherein each of the first oxide semiconductor layer, the second oxide semiconductor layer, and the third oxide semiconductor layer comprises In-M-Zn oxide.

10. The semiconductor device according to claim 9 , wherein M is selected from the group consisting of aluminum, gallium, yttrium, and tin.

11. A semiconductor device comprising:

a transistor, the transistor comprising:

a first oxide semiconductor layer;

a first insulating layer over the first oxide semiconductor layer, the first insulating layer comprising an opening;

a gate electrode, a first part of the gate electrode provided in the opening; and

a gate insulating layer located between the first oxide semiconductor layer and the gate electrode,

wherein in a cross section parallel to a channel length direction of the transistor, a first width of the opening is smaller than a first width of the first oxide semiconductor layer,

wherein in a cross section parallel to a channel width direction of the transistor, a second width of the opening is larger than a second width of the first oxide semiconductor layer,

wherein in the cross section parallel to the channel width direction of the transistor, a second part of the gate electrode does not overlap with the first oxide semiconductor layer, and

wherein a bottom surface of the second part of the gate electrode is located below a bottom surface of the first oxide semiconductor layer.

12. The semiconductor device according to claim 11 , wherein the first oxide semiconductor layer is an island-shaped oxide semiconductor layer.

13. The semiconductor device according to claim 11 , wherein the first oxide semiconductor layer comprises indium.

14. The semiconductor device according to claim 11 , wherein the first oxide semiconductor layer comprises In-M-Zn oxide.

15. The semiconductor device according to claim 14 , wherein M is selected from the group consisting of aluminum, gallium, yttrium, and tin.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 13, 2020
From: YAMAZAKI, SHUNPEI; SAKAKURA, MASAYUKI
To: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
Reel/Frame 051810/0913 →
Priority Claims (1)
JP 2014-069534 · Mar 28, 2014 · national
Continuity (4)
Continuation 16354327 · Mar 15, 2019
Continuation 15952433 · Apr 13, 2018
Continuation 14669459 · Mar 26, 2015
Related Publication 20200185536A1 · Jun 11, 2020
Cited By (3)
US 12,317,600 US 12,446,302 US 12,563,716