Semiconductor device
A semiconductor device includes a plurality of active patterns protruding from a substrate, a gate structure intersecting the plurality of active patterns, a plurality of source/drain regions respectively on the plurality of active patterns at opposite sides of the gate structure, and source/drain contacts intersecting the plurality of active patterns, each of the source/drain contacts connected in common to the source/drain regions thereunder, each of the plurality of source/drain regions including a first portion in contact with a top surface of the active pattern thereunder, the first portion having a width substantially increasing as a distance from the substrate increases, and a second portion extending from the first portion, the second portion having a width substantially decreasing as a distance from the substrate increases, bottom surfaces of the source/drain contacts being lower than an interface between the first and second portions.
1. A semiconductor device, comprising:
a first active pattern and a second active pattern in a first region having a first conductivity type, the first and second active patterns protruding from a substrate;
a first device isolation pattern on the substrate and between the first and second active patterns;
a first source/drain region and a second source/drain region electrically connected to the first and second active patterns, respectively;
a source/drain contact electrically connected to both of the first and second source/drain regions; and
a third active pattern in a second region having a second conductivity type that is different from the first conductivity type, the third active pattern protruding from a substrate,
wherein the second active pattern is between the first active pattern and the third active pattern,
wherein the first source/drain region includes:
a lower portion having a width substantially increasing as a distance from the substrate increases; and
an upper portion on the lower portion, the upper portion having a width substantially decreasing as a distance from the substrate increases,
wherein the source/drain contact has a bottommost surface that is between the second and third active patterns, and
wherein the bottommost surface of the source/drain contact is lower than an interface between the lower and upper portions of the first source/drain region.
2. The semiconductor device as claimed in claim 1 , further comprising an air gap between the first active pattern and the second active pattern and below the source/drain contact.
3. The semiconductor device as claimed in claim 1 , further comprising a second device isolation pattern on the substrate and between the second and third active patterns.
4. The semiconductor device as claimed in claim 3 , wherein the bottommost surface is spaced apart from the first device isolation patterns.
5. The semiconductor device as claimed in claim 1 , wherein a first distance between the first and second active patterns is less than a second distance between the second and third active patterns.
6. The semiconductor device as claimed in claim 1 , wherein the first and second source/drain regions have the same conductivity type.
7. The semiconductor device as claimed in claim 1 , wherein the source/drain contact has a waved bottom surface on the first source/drain region and the second source/drain region.
8. The semiconductor device as claimed in claim 1 , further comprising an etch stop layer between the bottommost surface of the source/drain contact and the first device isolation pattern.
9. A semiconductor device, comprising:
a first active pattern and a second active pattern, the first and second active patterns protruding from a substrate;
a first device isolation pattern on the substrate and between the first and second active patterns;
a first source/drain region and a second source/drain region electrically connected to the first and second active patterns, respectively;
a source/drain contact electrically connected to both of the first and second source/drain regions;
a third active pattern protruding from a substrate; and
an air gap between the first active pattern and the second active pattern and below the source/drain contact,
wherein the second active pattern is between the first active pattern and the third active pattern,
wherein the first source/drain region includes:
a lower portion having a width substantially increasing as a distance from the substrate increases; and
an upper portion on the lower portion, the upper portion having a width substantially decreasing as a distance from the substrate increases,
wherein the source/drain contact has a bottommost surface that is between the second and third active patterns, and
wherein the bottommost surface of the source/drain contact is lower than an interface between the lower and upper portions of the first source/drain region.
10. The semiconductor device as claimed in claim 9 , further comprising a second device isolation pattern on the substrate and between the second and third active patterns.
11. The semiconductor device as claimed in claim 10 , wherein the bottommost surface is spaced apart from the first device isolation patterns.
12. The semiconductor device as claimed in claim 11 , further comprising an etch stop layer between the bottommost surface of the source/drain contact and the second device isolation pattern.
13. The semiconductor device as claimed in claim 9 , further comprising an etch stop layer between the bottommost surface of the source/drain contact and the first device isolation pattern.
14. The semiconductor device as claimed in claim 9 , wherein a first distance between the first and second active patterns is less than a second distance between the second and third active patterns.
15. The semiconductor device as claimed in claim 9 , wherein the first and second active patterns are in a first region having a first conductivity type.
16. The semiconductor device as claimed in claim 15 , wherein the third active pattern is in a second region having a second conductivity type that is different from the first conductivity type.
17. The semiconductor device as claimed in claim 9 , wherein the source/drain contact has a waved bottom surface on the first source/drain region and the second source/drain region.
18. A semiconductor device, comprising:
a first active pattern and a second active pattern, the first and second active patterns protruding from a substrate;
a first device isolation pattern on the substrate and between the first and second active patterns;
a first source/drain region and a second source/drain region electrically connected to the first and second active patterns, respectively;
a source/drain contact electrically connected to both of the first and second source/drain regions;
a third active pattern protruding from a substrate;
a second device isolation pattern on the substrate and between the second and third active patterns; and
a third source/drain region electrically connected to the third active pattern,
wherein the second active pattern is between the first and third active patterns,
wherein the first source/drain region includes:
a first lower portion having a width substantially increasing as a distance from the substrate increases; and
a first upper portion on the lower portion, the upper portion having a width substantially decreasing as a distance from the substrate increases,
wherein the third source/drain region includes:
a second lower portion having a width substantially increasing as a distance from the substrate increases; and
a second upper portion on the lower portion, the upper portion having a width substantially decreasing as a distance from the substrate increases,
wherein a portion of the source/drain contact extends between the second and third active patterns, a bottommost surface of the source/drain contact being between the second and third active patterns, and
wherein a first distance between the first and second active patterns is less than a second distance between the second and third active patterns.
19. The semiconductor device as claimed in claim 18 , further comprising an air gap between the first active pattern and the second active pattern, the air gap being below the source/drain contact.
20. The semiconductor device as claimed in claim 18 , wherein the source/drain contact has a waved bottom surface on the first source/drain region and the second source/drain region.