IP Library Granted Patent US 11,101,006
Granted Patent B2
US 11,101,006 · App. 16/921,804 · Granted Aug 24, 2021

Read level tracking and optimization

Inventors: Richard David Barndt (San Diego, CA); Aldo Giovanni Cometti (San Diego, CA); Richard Leo Galbraith (Rochester, MN); Jonas Andrew Goode (Lake Forest, CA); Niranjay Ravindran (Rochester, MN); Anthony Dwayne Weathers (San Diego, CA)
Assignee: Western Digital Technologies, Inc.
G11C16/3427G06F3/0656G06F3/0679G06F11/1072G11C11/5642G11C16/3486G11C16/3495G11C29/021G11C29/028G11C2211/5644
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Quick Facts
Patent No.
US 11,101,006
App. No.
16/921,804
Granted
Aug 24, 2021
Kind
B2
Abstract

Systems and methods for read level tracking and optimization are described. Pages from a wordline of a flash memory device read and the raw page data read from the wordline may be buffered in a first set of buffers. The raw page data for each of the pages may be provided to a decoder for decoding and the decoded page data for each of the pages buffered in a second set of buffers. First bin identifiers may be identified for memory cells of the wordline based on the raw page data and second bin identifiers may be identified for the memory cells of the wordline based on the decoded page data. Cell-level statistics may be accumulated based on the first bin identifiers and the second bin identifiers, and a gradient may be determined for respective read levels based on decoding results for each of the pages and the cell-level statistics. Settings for the read levels may be configured in the flash memory device based on the determined gradients.

Claims (72)

1. A data storage system, comprising:

one or more memory devices; and

one or more controllers configured to cause:

obtaining raw data read from memory cells of the one or more memory devices, for decoding;

obtaining decoded data based on the raw data;

computing memory cell-level statistics based on first bin identifiers associated with the raw data and second bin identifiers associated with the decoded data;

determining gradients for read levels associated with the one or more memory devices based on results of the decoding and the memory cell-level statistics; and

setting parameters of the read levels associated with the one or more memory devices based on the determined gradients.

2. The data storage system of claim 1 , wherein the one or more controllers are configured to cause:

identifying the first bin identifiers for the memory cells based on the raw data stored in one or more first memories; and

identifying the second bin identifiers for the memory cells based on the decoded data stored in one or more second memories.

3. The data storage system of claim 1 , wherein each of the determined gradients comprises a magnitude and a direction for adjusting a respective read level of the read levels associated with the one or more memory devices.

4. The data storage system of claim 1 , wherein the one or more controllers are configured to cause:

identifying the first bin identifiers for the memory cells based on logical values of the raw data, and

identifying the second bin identifiers for the memory cells based on logical values of the decoded data.

5. The data storage system of claim 4 , wherein the one or more controllers are configured to cause:

identifying the first bin identifiers by applying reverse gray coding to the logical values of the raw data, and

identifying the second bin identifiers by applying the reverse gray coding to the logical values of the decoded data.

6. The data storage system of claim 1 , wherein the one or more controllers are configured to cause computing the memory cell-level statistics by:

incrementing bin counts based on the first bin identifiers or the second bin identifiers;

comparing the first bin identifiers to the second bin identifiers; and

incrementing first error-type counts and second error-type counts based on the comparison of the first bin identifiers to the second bin identifiers.

7. The data storage system of claim 6 , wherein the one or more controllers are configured to cause determining the gradients for the read levels by:

applying a gradient generator matrix to the bin counts to determine a first set of gradients;

determining a second set of gradients based on a difference between the first error-type counts and the second error-type counts; and

selecting the gradients, for the read levels, from the first set of gradients or from the second set of gradients based on the results of the decoding.

8. The data storage system of claim 7 , wherein the one or more controllers are configured to cause applying the gradient generator matrix to the bin counts by:

selecting the gradient generator matrix from gradient generator matrices based on the results of the decoding; and

multiplying the gradient generator matrix by the bin counts to determine the first set of gradients.

9. A method, comprising:

obtaining raw data read from memory cells of one or more memory devices, for decoding;

obtaining decoded data based on the raw data;

computing memory cell-level statistics based on first bin identifiers associated with the raw data and second bin identifiers associated with the decoded data;

determining gradients for read levels associated with the one or more memory devices based on results of the decoding and the memory cell-level statistics; and

setting parameters of the read levels associated with the one or more memory devices based on the gradients.

10. The method of claim 9 , comprising:

identifying the first bin identifiers for the memory cells based on the raw data stored in one or more first memories; and

identifying the second bin identifiers for the memory cells based on the decoded data stored in one or more second memories.

11. The method of claim 9 , wherein each of the gradients comprises a magnitude and a direction for adjusting a respective read level of the read levels associated with the one or more memory devices.

12. The method of claim 9 , comprising:

identifying the first bin identifiers for the memory cells based on logical values of the raw data, and

identifying the second bin identifiers for the memory cells based on logical values of the decoded data.

13. The method of claim 12 ,

wherein identifying the first bin identifiers comprises identifying the first bin identifiers by applying reverse gray coding to the logical values of the raw data, and

wherein identifying the second bin identifiers comprises identifying the second bin identifiers by applying the reverse gray coding to the logical values of the decoded data.

14. The method of claim 9 , wherein computing the memory cell-level statistics comprises:

incrementing bin counts based on the first bin identifiers or the second bin identifiers;

comparing the first bin identifiers to the second bin identifiers; and

incrementing first error-type counts and second error-type counts based on the comparison of the first bin identifiers to the second bin identifiers.

15. The method of claim 14 , wherein determining the gradients for the read levels comprises:

applying a gradient generator matrix to the bin counts to determine a first set of gradients;

determining a second set of gradients based on a difference between the first error-type counts and the second error-type counts; and

selecting the gradients, for the read levels, from the first set of gradients or from the second set of gradients based on the results of the decoding.

16. The method of claim 15 , wherein applying the gradient generator matrix to the bin counts comprises:

selecting the gradient generator matrix from gradient generator matrices based on the results of the decoding; and

multiplying the gradient generator matrix by the bin counts to determine the first set of gradients.

17. An apparatus, comprising:

means for obtaining raw data read from memory cells of one or more memory devices, for decoding;

means for obtaining decoded data based on the raw data;

means for computing memory cell-level statistics based on first bin identifiers associated with the raw data and second bin identifiers associated with the decoded data;

means for determining gradients for read levels associated with the one or more memory devices based on results of the decoding and the memory cell-level statistics; and

means for setting parameters of the read levels associated with the one or more memory devices based on the gradients.

18. The apparatus of claim 17 , comprising:

means for identifying the first bin identifiers for the memory cells based on logical values of the raw data, and

means for identifying the second bin identifiers for the memory cells based on logical values of the decoded data.

19. The apparatus of claim 18 ,

wherein the means for identifying the first bin identifiers comprises means for identifying the first bin identifiers by applying reverse gray coding to the logical values of the raw data, and

wherein the means for identifying the second bin identifiers comprises means for identifying the second bin identifiers by applying the reverse gray coding to the logical values of the decoded data.

20. The apparatus of claim 17 , wherein the means for computing the memory cell-level statistics comprises:

means for incrementing bin counts based on the first bin identifiers or the second bin identifiers;

means for comparing the first bin identifiers to the second bin identifiers; and

means for incrementing first error-type counts and second error-type counts based on the comparison of the first bin identifiers to the second bin identifiers.

Assignments (10)
SECURITY AGREEMENT Recorded Apr 25, 2025
From: SANDISK TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
Reel/Frame 071050/0001 →
PARTIAL RELEASE OF SECURITY INTERESTS Recorded Apr 25, 2025
From: JPMORGAN CHASE BANK, N.A., AS AGENT
To: SANDISK TECHNOLOGIES, INC.
Reel/Frame 071382/0001 →
PATENT COLLATERAL AGREEMENT Recorded Aug 23, 2024
From: SANDISK TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A., AS THE AGENT
Reel/Frame 068762/0494 →
CHANGE OF NAME Recorded Jun 27, 2024
From: SANDISK TECHNOLOGIES, INC.
To: SANDISK TECHNOLOGIES, INC.
Reel/Frame 067982/0032 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 29, 2024
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: SANDISK TECHNOLOGIES, INC.
Reel/Frame 067567/0682 →
PATENT COLLATERAL AGREEMENT - DDTL LOAN AGREEMENT Recorded Aug 21, 2023
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A.
Reel/Frame 067045/0156 →
PATENT COLLATERAL AGREEMENT - A&R LOAN AGREEMENT Recorded Aug 21, 2023
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A.
Reel/Frame 064715/0001 →
RELEASE OF SECURITY INTEREST AT REEL 053926 FRAME 0446 Recorded Feb 8, 2022
From: JPMORGAN CHASE BANK, N.A.
To: WESTERN DIGITAL TECHNOLOGIES, INC.
Reel/Frame 058966/0321 →
SECURITY INTEREST Recorded Sep 29, 2020
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A., AS AGENT
Reel/Frame 053926/0446 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 24, 2020
From: BARNDT, RICHARD DAVID; COMETTI, ALDO GIOVANNI; GALBRAITH, RICHARD LEO; GOODE, JONAS ANDREW; RAVINDRAN, NIRANJAY; WEATHERS, ANTHONY DWAYNE
To: WESTERN DIGITAL TECHNOLOGIES, INC.
Reel/Frame 053308/0861 →
Continuity (4)
Continuation 16354039 · Mar 14, 2019
Continuation 15665200 · Jul 31, 2017
Provisional Application 62525677 · Jun 27, 2017
Related Publication 20200335173A1 · Oct 22, 2020