Display device
An object is to provide a display device that performs accurate display. A circuit is formed using a transistor that includes an oxide semiconductor and has a low off-state current. A precharge circuit or an inspection circuit is formed in addition to a pixel circuit. The off-state current is low because the oxide semiconductor is used. Thus, it is not likely that a signal or voltage is leaked in the precharge circuit or the inspection circuit to cause defective display. As a result, a display device that performs accurate display can be provided.
1. A method for manufacturing a semiconductor device, the semiconductor device comprising:
a pixel portion comprising a first transistor and a first liquid crystal element;
a circuit comprising a second transistor and configured to inspect the pixel portion;
a first wiring; and
a second wiring,
wherein the first liquid crystal element is electrically connected to the first wiring via the first transistor,
wherein the first wiring is electrically connected to the second wiring via the second transistor,
wherein a channel width of the second transistor is larger than a channel width of the first transistor,
wherein the first transistor comprises a first oxide semiconductor layer,
wherein the second transistor comprises a second oxide semiconductor layer,
wherein each of the first oxide semiconductor layer and the second oxide semiconductor layer comprise In, Ga, and Zn,
the method comprising:
a first step of performing a first heat treatment on the first oxide semiconductor layer and the second oxide semiconductor layer;
a second step of performing a second heat treatment after the first heat treatment wherein an oxide insulating layer is in contact with the first oxide semiconductor layer and the second oxide semiconductor layer;
a third step after the second heat treatment of forming a nitrogen silicon film on the oxide insulating layer; and
a fourth step after the third step of inspecting the pixel portion by the circuit.
2. A method for manufacturing a semiconductor device, the semiconductor device comprising:
a pixel portion comprising:
a first pixel comprising a first transistor and a first liquid crystal element; and
a second pixel comprising a second transistor and a second liquid crystal element;
a circuit comprising a third transistor and a fourth transistor, and configured to inspect the pixel portion;
a first wiring;
a second wiring;
a third wiring; and
a fourth wiring,
wherein the first liquid crystal element is electrically connected to the first wiring via the first transistor,
wherein the second liquid crystal element is electrically connected to the second wiring via the second transistor,
wherein the first wiring is electrically connected to the third wiring via the third transistor,
wherein the second wiring is electrically connected to the fourth wiring via the fourth transistor,
wherein a channel width of the third transistor is larger than a channel width of the first transistor,
wherein a channel width of the fourth transistor is larger than a channel width of the second transistor,
wherein a gate of the third transistor is electrically connected to a gate of the fourth transistor,
wherein the first transistor comprises a first oxide semiconductor layer,
wherein the second transistor comprises a second oxide semiconductor layer,
wherein the third transistor comprises a third oxide semiconductor layer,
wherein the fourth transistor comprises a fourth oxide semiconductor layer,
wherein each of the first oxide semiconductor layer, the second oxide semiconductor layer, the third oxide semiconductor layer and the fourth oxide semiconductor layer comprise In, Ga, and Zn,
the method comprising:
a first step of performing a first heat treatment on the first oxide semiconductor layer, the second oxide semiconductor layer, the third oxide semiconductor layer and the fourth oxide semiconductor layer;
a second step of performing a second heat treatment after the first heat treatment wherein an oxide insulating layer is in contact with each of the first oxide semiconductor layer, the second oxide semiconductor layer, the third oxide semiconductor layer and the fourth oxide semiconductor layer;
a third step after the second heat treatment of forming a nitrogen silicon film on the oxide insulating layer; and
a fourth step after the third step of inspecting the pixel portion by the circuit.