Granted Patent
S1
US 1,115,719 · App. 29/845,733 · Granted Mar 3, 2026
Lower edge ring of a process kit for semiconductor substrate processing
Inventors:
Muhannad Mustafa (Santa Clara, CA); Muhammad M. Rasheed (San Jose, CA); Yu Lei (Belmont, CA); Avgerinos V. Gelatos (Redwood City, CA); Vikash Banthia (Los Altos, CA); Victor H. Calderon (Sunnyvale, CA); Shi Wei Toh (Sunnyvale, CA); Yung-Hsin Lee (San Jose, CA); Anindita Sen (San Jose, CA)
Assignee:
APPLIED MATERIALS, INC.
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Claims (1)
The ornamental design for a lower edge ring of a process kit for semiconductor substrate processing, as shown and described.
Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST
Recorded Aug 1, 2022
From: MUSTAFA, MUHANNAD; RASHEED, MUHAMMAD M.; LEI, YU; GELATOS, AVGERINOS V.; BANTHIA, VIKASH; CALDERON, VICTOR H.; TOH, SHI WEI; LEE, YUNG-HSIN; SEN, ANINDITA
To: APPLIED MATERIALS, INC.
Reel/Frame 060686/0227 →
Continuity (1)
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