Three-dimensional memory device including composite word lines and multi-strip select lines and method for making the same
An alternating stack of insulating layers and sacrificial material layers is formed over a substrate. Memory stack structures are formed through the alternating stack. Drain-select-level trenches through an upper subset of the sacrificial material layers, and backside trenches are formed through each layer of the alternating stack. Backside recesses are formed by removing the sacrificial material layers. A first electrically conductive material and a second electrically conductive material are sequentially deposited in the backside recesses and the drain-select-level trenches. Portions of the second electrically conductive material and the first electrically conductive material may be removed by at least one anisotropic etch process from the drain-select-level trenches to provide drain-select-level electrically conductive layers as multiple groups that are laterally spaced apart and electrically isolated from one another by cavities within the drain-select-level trenches.
1. A three-dimensional memory device comprising:
a first alternating stack of insulating layers and electrically conductive layers located over a substrate; and
memory stack structures extending through the first alternating stack;
wherein:
the electrically conductive layers comprise drain-select-level electrically conductive layers located in at least two different levels having different vertical distances from the substrate and laterally spaced apart as multiple groups that are electrically isolated from one another;
the electrically conductive layers further comprise word-line-level electrically conductive layers that underlie the drain-select-level electrically conductive layers and comprise a respective pair of sidewalls that laterally extend along a first horizontal direction;
each of the word-line-level electrically conductive layers comprises a respective first electrically conductive material layer including a first electrically conductive material and a respective second electrically conductive material layer comprising a second electrically conductive material that is different from the first electrically conductive material and formed within the respective first electrically conductive material layer; and
each of the drain-select-level electrically conductive layers consists essentially of the first electrically conductive material; and
at least one feature comprising:
a first feature wherein the respective second electrically conductive material layer within each of the word-line-level electrically conductive layers is located above, and contacts a top surface of, a lower horizontally-extending portion of the respective first electrically conductive material layer and is located below, and contacts a bottom surface of, an upper horizontally-extending portion of the respective first electrically conductive material layer within each of the word-line-level electrically conductive layers; or
a second feature wherein each of the drain-select-level electrically conductive layers comprises a respective horizontal top surface and a respective horizontal bottom surface; and an entire volume vertically bounded between the respective horizontal top surface and the respective horizontal bottom surface and laterally bounded by peripheries of the respective horizontal top surface and the respective horizontal bottom surface includes no other solid phase material than the first electrically conductive material; or
a third feature wherein each of the drain-select-level electrically conductive layers does not contact any material portion comprising the second electrically conductive material; or
a fourth feature wherein each of the drain-select-level electrically conductive layers does not contact any material portion consisting essentially of the second electrically conductive material.
2. The three-dimensional memory device of claim 1 , wherein:
the first electrically conductive material consists essentially of a first elemental metal; and
the second electrically conductive material consists essentially of a second elemental metal.
3. The three-dimensional memory device of claim 2 , wherein:
the first elemental metal comprises tungsten; and
the second elemental metal comprises a metal selected from molybdenum, cobalt, or ruthenium.
4. The three-dimensional memory device of claim 1 , wherein each horizontal surface of the second electrically conductive material layers contacts a horizontal surface of the first electrically conductive material layers.
5. The three-dimensional memory device of claim 4 , further comprising conformal insulating spacers contacting sidewalls of the insulating layers and sidewalls of the electrically conductive layers, wherein each sidewall of the second electrically conductive material layers contacts a sidewall of the first electrically conductive material layers or a sidewall of the conformal insulating spacers.
6. The three-dimensional memory device of claim 1 , wherein drain-select-level electrically conductive layers within each group selected from the multiple groups are electrically isolated from each other or one another.
7. The three-dimensional memory device of claim 1 , each of the electrically conductive layers includes a sidewall that is laterally offset from a sidewall of a most proximal one of the insulating layers by a same lateral offset distance.
8. The three-dimensional memory device of claim 1 , wherein the at least one feature comprises the first feature.
9. The three-dimensional memory device of claim 1 , wherein the at least one feature comprises the second feature.
10. The three-dimensional memory device of claim 1 , wherein the at least one feature comprises the third feature.
11. The three-dimensional memory device of claim 1 , wherein the at least one feature comprises the fourth feature.
12. The three-dimensional memory device of claim 1 , wherein each of the memory stack structures comprises a vertical semiconductor channel and a vertical stack of charge storage regions.
13. A three-dimensional memory device comprising:
a first alternating stack of insulating layers and electrically conductive layers located over a substrate; and
memory stack structures extending through the first alternating stack;
wherein:
the electrically conductive layers comprise drain-select-level electrically conductive layers located in at least two different levels having different vertical distances from the substrate and laterally spaced apart as multiple groups that are electrically isolated from one another;
the electrically conductive layers further comprise word-line-level electrically conductive layers that underlie the drain-select-level electrically conductive layers and comprise a respective pair of sidewalls that laterally extend along a first horizontal direction;
each of the word-line-level electrically conductive layers comprises a respective first electrically conductive material layer including a first electrically conductive material and a respective second electrically conductive material layer comprising a second electrically conductive material that is different from the first electrically conductive material and formed within the respective first electrically conductive material layer;
each of the drain-select-level electrically conductive layers consists essentially of the first electrically conductive material;
each of the word-line-level electrically conductive layers is embedded within a respective first metallic barrier layer; and
each of the drain-select-level electrically conductive layers is embedded within a respective second metallic barrier layer.
14. The three-dimensional memory device of claim 13 , wherein the first metallic barrier layers and the second metallic barrier layers have a same material composition and a same thickness.
15. The three-dimensional memory device of claim 13 , wherein the first metallic barrier layers and the second metallic barrier layers comprise a material selected from a conductive metallic nitride material or a conductive metallic carbide material.
16. The three-dimensional memory device of claim 13 , wherein each of the first metallic barrier layers and the second metallic barrier layers is vertically spaced from a respective most proximal one among the insulating layers and is laterally spaced from the memory stack structures by a respective backside blocking dielectric layer.
17. The three-dimensional memory device of claim 13 , wherein each of the first metallic barrier layers and the second metallic barrier layers contacts a top surface of a respective underlying insulating layer among the insulating layers, and contacts a bottom surface of a respective overlying insulating layer among the insulating layers.
18. The three-dimensional memory device of claim 13 , wherein:
each of the memory stack structures is laterally surrounded by a respective blocking dielectric layer that vertically extends through the alternating stack; and
each of the first metallic barrier layers and the second metallic barrier layers contacts sidewalls of the blocking dielectric layers.
19. A three-dimensional memory device comprising:
a first alternating stack of insulating layers and electrically conductive layers located over a substrate; and
memory stack structures extending through the first alternating stack;
wherein:
the electrically conductive layers comprise drain-select-level electrically conductive layers located in at least two different levels having different vertical distances from the substrate and laterally spaced apart as multiple groups that are electrically isolated from one another;
the electrically conductive layers further comprise word-line-level electrically conductive layers that underlie the drain-select-level electrically conductive layers and comprise a respective pair of sidewalls that laterally extend along a first horizontal direction;
each of the word-line-level electrically conductive layers comprises a respective first electrically conductive material layer including a first electrically conductive material and a respective second electrically conductive material layer comprising a second electrically conductive material that is different from the first electrically conductive material and formed within the respective first electrically conductive material layer;
each of the drain-select-level electrically conductive layers consists essentially of the first electrically conductive material;
each of the word-line-level electrically conductive layers is embedded within a respective first backside blocking dielectric layer; and
each of the drain-select-level electrically conductive layers is embedded within a respective second backside blocking dielectric layer.
20. The three-dimensional memory device of claim 19 , wherein the first backside blocking dielectric layers and the second backside blocking dielectric layers have a same material composition and a same thickness.