Memory device using a multilayer ferroelectric stack and method of forming the same
A memory device includes a semiconductor channel, a gate electrode, and a stack located between the semiconductor channel and the gate electrode. The stack includes, from one side to another, a first ferroelectric material portion, a second ferroelectric material portion, and a gate dielectric portion that contacts the semiconductor channel.
1. A memory device, comprising:
an alternating stack of insulating layers and electrically conductive layers comprising: gate electrodes and located over a substrate;
a vertical semiconductor channel vertically extending through the alternating stack;
and
a stack located between the vertical semiconductor channel and the electrically conductive layers, the stack including, from one side to another, a first ferroelectric material layer comprising a first ferroelectric material, a second ferroelectric material layer comprising a second ferroelectric material, and a gate dielectric layer that contacts the vertical semiconductor channel,
wherein the second ferroelectric material extends vertically from a bottommost one of the insulating layers to a topmost one of the insulating layers, and exhibits spontaneous electrical polarization in an absence of an external electric field at each level of the insulating layers; and
wherein the vertical semiconductor channel is in direct contact with a cylindrical sidewall of the first ferroelectric material layer and in direct contact with a cylindrical sidewall of the second ferroelectric material layer.