IP Library › Granted Patent US 11,545,560
Granted Patent B2
US 11,545,560 · App. 17/160,421 · Granted Jan 3, 2023

Semiconductor device and method for fabricating the same

Inventors: Wei-Chih Chuang (Tainan, TW); Chia-Jong Liu (Ping-Tung County, TW); Kuang-Hsiu Chen (Tainan, TW); Chung-Ting Huang (Kaohsiung, TW); Chi-Hsuan Tang (Kaohsiung, TW); Kai-Hsiang Wang (Taichung, TW); Bing-Yang Jiang (Tainan, TW); Yu-Lin Cheng (Changhua County, TW); Chun-Jen Chen (Tainan, TW); Yu-Shu Lin (Tainan, TW); Jhong-Yi Huang (Nantou County, TW); Chao-Nan Chen (Tainan, TW); Guan-Ying Wu (Kaohsiung, TW)
Assignee: UNITED MICROELECTRONICS CORP.
H01L29/6656H01L29/42364
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Quick Facts
Patent No.
US 11,545,560
App. No.
17/160,421
Granted
Jan 3, 2023
Kind
B2
Abstract

A method for fabricating semiconductor device includes the steps of: forming a gate structure on a substrate; forming a first spacer and a second spacer around the gate structure; forming a recess adjacent to two sides of the second spacer; performing a cleaning process to trim the second spacer for forming a void between the first spacer and the substrate; and forming an epitaxial layer in the recess.

Claims (14)

1. A method for fabricating semiconductor device, comprising:

forming a gate structure on a substrate;

forming a first spacer and a second spacer around the gate structure;

forming a recess adjacent to two sides of the first spacer;

performing a cleaning process to trim the second spacer for forming a void between the second spacer and the substrate and reducing an overall width of the second spacer; and

forming an epitaxial layer in the recess.

2. The method of claim 1 , wherein at least a portion of the first spacer comprises an L-shape and at least a portion of the second spacer comprises an I-shape.

3. The method of claim 1 , wherein the first spacer comprises silicon oxide and the second spacer comprises silicon nitride.

4. The method of claim 1 , further comprising forming a third spacer around the gate structure before forming the first spacer.

5. The method of claim 4 , wherein at least a portion of the third spacer comprises an I-shape.

6. The method of claim 1 , further comprising a cap layer on the epitaxial layer while filling the void.

7. The method of claim 6 , wherein the cap layer comprises silicon.

8. The method of claim 6 , wherein the cap layer comprises a planar top surface and an inclined sidewall.

9. The method of claim 8 , wherein the cap layer further comprises a vertical sidewall connected to the inclined sidewall.

Priority Claims (1)
TW 108103436 · Jan 30, 2019 · national
Continuity (2)
Division 16294877 · Mar 6, 2019
Related Publication 20210151580A1 · May 20, 2021
Cited By (1)
US 12,317,548