Granted Patent B2

US 11,557,613 · App. 17/673,958 · Granted Jan 17, 2023

Inventor: Atsushi Umezaki (Kanagawa, JP)

Assignee: Semiconductor Energy Laboratory Co., Ltd.

H01L27/1255G09G3/14G09G3/32G09G3/36G11C19/00H01L29/7869H03B1/00H03K3/00H03K17/6871G09G2300/0426G09G2310/0286G09G2330/021

Abstract

Claims (105)

1. A semiconductor device comprising:

a shift register circuit comprising:

a first transistor;

a second transistor;

a third transistor;

a fourth transistor;

a fifth transistor;

a sixth transistor;

a seventh transistor;

an eighth transistor;

a ninth transistor; and

a capacitor,

wherein each of the first transistor, the second transistor, the third transistor, the fourth transistor, the fifth transistor, the sixth transistor, the seventh transistor, the eighth transistor and the ninth transistor comprises a gate, a first terminal and a second terminal,

wherein the first terminal of the first transistor is electrically connected to the first terminal of the second transistor,

wherein the first terminal of the third transistor is electrically connected to the gate of the second transistor,

wherein the gate of the third transistor is electrically connected to the gate of the first transistor,

wherein the gate of the fourth transistor is electrically connected to the gate of the first transistor,

wherein the gate of the fifth transistor is electrically connected to the gate of the first transistor,

wherein the first terminal of the sixth transistor is electrically connected to the gate of the second transistor,

wherein the gate of the sixth transistor is electrically connected to the first terminal of the fifth transistor,

wherein the first terminal of the seventh transistor is electrically connected to the first terminal of the fourth transistor,

wherein the gate of the seventh transistor is electrically connected to the first terminal of the fifth transistor,

wherein the first terminal of the eighth transistor is electrically connected to the gate of the first transistor,

wherein the first terminal of the ninth transistor is electrically connected to the gate of the first transistor,

wherein a first electrode of the capacitor is electrically connected to the gate of the first transistor,

wherein a second electrode of the capacitor is electrically connected to the first terminal of the fourth transistor, and

wherein the second electrode of the capacitor is electrically connected to the first terminal of the seventh transistor.

2. The semiconductor device according to claim 1 ,

wherein the second terminal of the sixth transistor is electrically connected to the second terminal of the seventh transistor.

3. The semiconductor device according to claim 1 ,

wherein the second terminal of the eighth transistor is electrically connected to the gate of the eighth transistor.

4. A semiconductor device comprising:

a shift register circuit comprising:

a first transistor;

a second transistor;

a third transistor;

a fourth transistor;

a fifth transistor;

a sixth transistor;

a seventh transistor;

an eighth transistor;

a ninth transistor; and

a capacitor,

wherein each of the first transistor, the second transistor, the third transistor, the fourth transistor, the fifth transistor, the sixth transistor, the seventh transistor, the eighth transistor and the ninth transistor comprises a gate, a first terminal and a second terminal,

wherein the first terminal of the first transistor is electrically connected to the first terminal of the second transistor,

wherein the first terminal of the third transistor is electrically connected to the gate of the second transistor,

wherein the gate of the third transistor is electrically connected to the gate of the first transistor,

wherein the gate of the fourth transistor is electrically connected to the gate of the first transistor,

wherein the gate of the fifth transistor is electrically connected to the gate of the first transistor,

wherein the first terminal of the sixth transistor is electrically connected to the gate of the second transistor,

wherein the gate of the sixth transistor is electrically connected to the first terminal of the fifth transistor,

wherein the first terminal of the seventh transistor is electrically connected to the first terminal of the fourth transistor,

wherein the gate of the seventh transistor is electrically connected to the first terminal of the fifth transistor,

wherein the first terminal of the eighth transistor is electrically connected to the gate of the first transistor,

wherein the first terminal of the ninth transistor is electrically connected to the gate of the first transistor,

wherein a first electrode of the capacitor is electrically connected to the gate of the first transistor,

wherein a second electrode of the capacitor is electrically connected to the first terminal of the fourth transistor,

wherein the second electrode of the capacitor is electrically connected to the first terminal of the seventh transistor,

wherein the second terminal of the sixth transistor is electrically connected to a signal line, and

wherein a clock signal is supplied to the signal line.

5. The semiconductor device according to claim 4 ,

wherein the second terminal of the first transistor is electrically connected to the signal line.

6. The semiconductor device according to claim 4 ,

wherein the second terminal of the seventh transistor is electrically connected to the signal line.

7. The semiconductor device according to claim 4 ,

wherein the second terminal of the eighth transistor is electrically connected to the gate of the eighth transistor.

8. A semiconductor device comprising:

a shift register circuit comprising:

a first transistor;

a second transistor;

a third transistor;

a fourth transistor;

a fifth transistor;

a sixth transistor;

a seventh transistor;

an eighth transistor;

a ninth transistor; and

a capacitor,

wherein each of the first transistor, the second transistor, the third transistor, the fourth transistor, the fifth transistor, the sixth transistor, the seventh transistor, the eighth transistor and the ninth transistor comprises a gate, a first terminal and a second terminal,

wherein the first terminal of the first transistor is electrically connected to the first terminal of the second transistor,

wherein the first terminal of the third transistor is directly connected to the gate of the second transistor,

wherein the gate of the third transistor is electrically connected to the gate of the first transistor,

wherein the gate of the fourth transistor is electrically connected to the gate of the first transistor,

wherein the gate of the fifth transistor is electrically connected to the gate of the first transistor,

wherein the first terminal of the sixth transistor is electrically connected to the gate of the second transistor,

wherein the gate of the sixth transistor is electrically connected to the first terminal of the fifth transistor,

wherein the first terminal of the seventh transistor is directly connected to the first terminal of the fourth transistor,

wherein the gate of the seventh transistor is electrically connected to the first terminal of the fifth transistor,

wherein the first terminal of the eighth transistor is electrically connected to the gate of the first transistor,

wherein the first terminal of the ninth transistor is electrically connected to the gate of the first transistor,

wherein a first electrode of the capacitor is directly connected to the gate of the first transistor,

wherein a second electrode of the capacitor is directly connected to the first terminal of the fourth transistor,

wherein the second electrode of the capacitor is directly connected to the first terminal of the seventh transistor,

wherein the second terminal of the second transistor is directly connected to a power supply line, and

wherein the second terminal of the third transistor is directly connected to the power supply line.

9. The semiconductor device according to claim 8 ,

wherein the second terminal of the sixth transistor is electrically connected to the second terminal of the seventh transistor.

10. The semiconductor device according to claim 8 ,

wherein the second terminal of the eighth transistor is electrically connected to the gate of the eighth transistor.

11. The semiconductor device according to claim 8 ,

wherein the second terminal of the fourth transistor is electrically connected to the power supply line.

12. The semiconductor device according to claim 8 ,

wherein the second terminal of the fifth transistor is electrically connected to the power supply line.

13. The semiconductor device according to claim 8 ,

wherein the second terminal of the ninth transistor is electrically connected to the power supply line.

Assignments (1)

Priority Claims (1)

Continuity (9)