IP Library Granted Patent US 11,563,124
Granted Patent B2
US 11,563,124 · App. 17/002,971 · Granted Jan 24, 2023

Semiconductor device including flip-flop circuit which includes transistors

Inventors: Hidekazu Miyairi (Kanagawa, JP); Takeshi Osada (Kanagawa, JP); Shunpei Yamazaki (Tokyo, JP)
Assignee: Semiconductor Energy Laboratory Co., Ltd.
H01L29/7869H01L21/02565H01L21/477H01L21/47635H01L27/1225H01L27/1251H01L27/1259H01L29/24H01L29/41733H01L29/42356H01L29/42384H01L29/45H01L29/66969H01L29/78621H01L29/78645H01L29/78648
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Quick Facts
Patent No.
US 11,563,124
App. No.
17/002,971
Granted
Jan 24, 2023
Kind
B2
Abstract

As a display device has a higher definition, the number of pixels, gate lines, and signal lines are increased. When the number of the gate lines and the signal lines are increased, a problem of high manufacturing cost, because it is difficult to mount an IC chip including a driver circuit for driving of the gate and signal lines by bonding or the like. A pixel portion and a driver circuit for driving the pixel portion are provided over the same substrate, and at least part of the driver circuit includes a thin film transistor using an oxide semiconductor interposed between gate electrodes provided above and below the oxide semiconductor. Therefore, when the pixel portion and the driver portion are provided over the same substrate, manufacturing cost can be reduced.

Claims (27)

1. A semiconductor device comprising:

a first transistor, a second transistor, a third transistor, a fourth transistor, a fifth transistor, a sixth transistor, and a seventh transistor,

wherein one of a source and a drain of the first transistor is electrically connected to one of a source and a drain of the sixth transistor and a first wiring,

wherein the other of the source and the drain of the first transistor is electrically connected to one of a source and a drain of the fifth transistor,

wherein a gate of the first transistor is electrically connected to a gate of the fifth transistor,

wherein the first wiring has a function of transmitting a signal which is output from a circuit comprising the first to seventh transistors,

wherein, in a top view, a first conductive layer, a second conductive layer, and a third conductive layer are arranged so that the first conductive layer having a function of the gate of the first transistor is electrically connected to the third conductive layer having a function of a gate of the second transistor, through the second conductive layer which has functions of one of a source and a drain of the third transistor, one of a source and a drain of the fourth transistor, and one of a source and a drain of the seventh transistor,

wherein one of a source and a drain of the second transistor is directly connected to a gate of the third transistor,

wherein the other of the source and the drain of the second transistor is electrically connected to a second wiring,

wherein the other of the source and the drain of the third transistor is electrically connected to the second wiring,

wherein the gate of the third transistor is directly connected to a gate of the sixth transistor,

wherein the other of the source and the drain of the fourth transistor is electrically connected to the second wiring, and

wherein the second transistor comprises a channel formation region which is over and overlap with the third conductive layer.

2. A semiconductor device comprising:

a first transistor, a second transistor, a third transistor, a fourth transistor, a fifth transistor, a sixth transistor, and a seventh transistor,

wherein one of a source and a drain of the first transistor is electrically connected to one of a source and a drain of the sixth transistor and a first wiring,

wherein the other of the source and the drain of the first transistor is electrically connected to one of a source and a drain of the fifth transistor,

wherein a gate of the first transistor is electrically connected to a gate of the fifth transistor,

wherein the first wiring has a function of transmitting a signal which is output from a circuit comprising the first to seventh transistors,

wherein, in a top view, a first conductive layer, a second conductive layer, and a third conductive layer are arranged so that the first conductive layer having a function of the gate of the first transistor is electrically connected to the third conductive layer having a function of a gate of the second transistor, through the second conductive layer which has functions of one of a source and a drain of the third transistor, one of a source and a drain of the fourth transistor, and one of a source and a drain of the seventh transistor,

wherein the first conductive layer is electrically connected to the third conductive layer without through a semiconductor layer,

wherein one of a source and a drain of the second transistor is directly connected to a gate of the third transistor,

wherein the other of the source and the drain of the second transistor is electrically connected to a second wiring,

wherein the other of the source and the drain of the third transistor is electrically connected to the second wiring,

wherein the gate of the third transistor is directly connected to a gate of the sixth transistor,

wherein the other of the source and the drain of the fourth transistor is electrically connected to the second wiring, and

wherein the second transistor comprises a channel formation region which is over and overlap with the third conductive layer.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 26, 2020
From: MIYAIRI, HIDEKAZU; OSADA, TAKESHI; YAMAZAKI, SHUNPEI
To: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
Reel/Frame 053604/0950 →
Priority Claims (1)
JP 2008-274540 · Oct 24, 2008 · national
Continuity (8)
Continuation 16180565 · Nov 5, 2018
Continuation 15814919 · Nov 16, 2017
Continuation 15443096 · Feb 27, 2017
Continuation 15071674 · Mar 16, 2016
Continuation 14694212 · Apr 23, 2015
Continuation 13302222 · Nov 22, 2011
Continuation 12581918 · Oct 20, 2009
Related Publication 20210050453A1 · Feb 18, 2021
Cited By (3)
US 12,190,842 US 12,211,569 US 12,477,781