Three-dimensional memory device including molybdenum carbide or carbonitride liners and methods of forming the same

1. A three-dimensional memory device, comprising:

an alternating stack of insulating layers and electrically conductive layers; and

memory stack structures vertically extending through the alternating stack, wherein each of the memory stack structures comprises a respective vertical semiconductor channel and a respective vertical stack of memory elements located at levels of the electrically conductive layers,

wherein each of the electrically conductive layers comprises a respective conductive liner consisting essentially of molybdenum carbonitride and a molybdenum metal fill material portion.

2. The three-dimensional memory device of claim 1 , wherein the conductive liners are amorphous and the molybdenum metal fill material portions are polycrystalline.

3. The three-dimensional memory device of claim 1 , wherein the conductive liners are free of halogen atoms or include halogen atoms at an atomic concentration less than 1 part per million.

4. The three-dimensional memory device of claim 1 , wherein the conductive liner has a composition of MoC x N y , wherein x is in a range from 0.16 to 0.28, and y is in a range from 0.44 to 0.90.

5. The three-dimensional memory device of claim 1 , wherein each of the conductive liners has a same uniform thickness that is in a range from 0.5 nm to 6 nm.

6. The three-dimensional memory device of claim 1 , wherein each of the electrically conductive layers is vertically spaced from a respective overlying one of the insulating layers and a respective underlying one of the insulating layers by a respective backside blocking dielectric layer comprising a dielectric metal oxide material.

7. The three-dimensional memory device of claim 6 , wherein:

the respective vertical stack of memory elements comprises portions of a silicon nitride charge storage layer located between a silicon oxide blocking dielectric and a tunneling dielectric; and

the electrically conductive layers comprise word lines.

8. The three-dimensional memory device of claim 7 , wherein the conductive liner contacts the backside blocking dielectric layer.

9. The three-dimensional memory device of claim 7 , further comprising diffusion barrier layer located between the backside blocking dielectric layer and the conductive liner, wherein the conductive liner contacts the diffusion barrier layer.

10. A method of forming a three-dimensional memory device, comprising:

forming an alternating stack of insulating layers and sacrificial material layers over a substrate;

forming memory openings through the alternating stack;

forming memory opening fill structures in the memory openings, wherein each of the memory opening fill structures comprises a respective vertical semiconductor channel and a respective vertical stack of memory elements located at levels of the sacrificial material layers;

forming backside trenches through the alternating stack;

forming backside recesses by removing the sacrificial material layers selective to the insulating layers and selective to the memory opening fill structures through the backside trenches;

depositing a backside blocking dielectric layer on physically exposed surfaces of the insulating layers and the memory opening fill structures around the backside recesses;

depositing a diffusion barrier layer on the backside blocking dielectric layer;

depositing a conductive liner comprising molybdenum carbide or molybdenum carbonitride in the backside recesses, wherein the conductive liner is deposited directly on the diffusion barrier layer; and

depositing molybdenum metal fill material portions in remaining volumes of the backside recesses on the conductive liner.

11. The method of claim 10 , wherein the conductive liner is deposited employing a conformal deposition process in which a precursor gas includes molybdenum and carbon, and excluding halogen atoms is decomposed.

12. The method of claim 11 , wherein the precursor gas is MoCO 6 .

13. The method of claim 12 , wherein:

the conductive liner is deposited by reduction of the precursor gas using hydrogen gas; and

the conductive liner has a composition of MoC z , wherein z is in a range from 0.5 to 1.0.

14. The method of claim 12 , wherein:

the conductive liner is deposited by reduction of the precursor gas using ammonia;

the conductive liner has a composition of MoC x N y , wherein x is in a range from 0.16 to 0.28, and y is in a range from 0.44 to 0.90.

15. The method of claim 10 , further comprising anisotropically etching portions of the conductive liner and the molybdenum metal fill material portions from inside the backside trenches, wherein each contiguous combination of remaining portions of the conductive liner and the metal fill material portions comprise word lines.

16. The method of claim 10 , further comprising depositing a backside blocking dielectric layer on physically exposed surfaces of the insulating layers and the memory opening fill structures around the backside recesses, wherein the conductive liner is deposited directly on the backside blocking dielectric layer.

17. A three-dimensional memory device, comprising:

an alternating stack of insulating layers and electrically conductive layers; and

memory stack structures vertically extending through the alternating stack, wherein each of the memory stack structures comprises a respective vertical semiconductor channel and a respective vertical stack of memory elements located at levels of the electrically conductive layers,

wherein each of the electrically conductive layers comprises a respective conductive liner comprising molybdenum carbide or molybdenum carbonitride and a molybdenum metal fill material portion;

wherein:

each of the electrically conductive layers is vertically spaced from a respective overlying one of the insulating layers and a respective underlying one of the insulating layers by a respective backside blocking dielectric layer comprising a dielectric metal oxide material;

the respective vertical stack of memory elements comprises portions of a silicon nitride charge storage layer located between a silicon oxide blocking dielectric and a tunneling dielectric;

the electrically conductive layers comprise word lines; and

a diffusion barrier layer is located between the backside blocking dielectric layer and the conductive liner, wherein the conductive liner contacts the diffusion barrier layer.

18. A method of forming a three-dimensional memory device, comprising:

forming an alternating stack of insulating layers and sacrificial material layers over a substrate;

forming memory openings through the alternating stack;

forming memory opening fill structures in the memory openings, wherein each of the memory opening fill structures comprises a respective vertical semiconductor channel and a respective vertical stack of memory elements located at levels of the sacrificial material layers;

forming backside trenches through the alternating stack;

forming backside recesses by removing the sacrificial material layers selective to the insulating layers and selective to the memory opening fill structures through the backside trenches;

depositing a conductive liner comprising molybdenum carbide or molybdenum carbonitride in the backside recesses; and

depositing molybdenum metal fill material portions in remaining volumes of the backside recesses on the conductive liner;

wherein:

the conductive liner is deposited employing a conformal deposition process in which a precursor gas includes molybdenum and carbon, and excluding halogen atoms is decomposed;

the precursor gas is MoCO 6 ; and

the conductive liner is deposited by reduction of the precursor gas using ammonia; and

the conductive liner has a composition of MoC x N y , wherein x is in a range from 0.16 to 0.28, and y is in a range from 0.44 to 0.90.