IP Library › Granted Patent US 11,658,088
Granted Patent B2
US 11,658,088 · App. 17/156,164 · Granted May 23, 2023

Structures and methods for heat dissipation of semiconductor devices

Inventors: S. L. Chen (Hsin-Chu, TW); Chen-Hsuan Yen (Taichung, TW); Han-Tang Lo (Hsinchu, TW)
Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
H01L23/367H01L21/76877H01L23/3677H01L23/49822H01L23/49827H01L23/5226
View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 11,658,088
App. No.
17/156,164
Granted
May 23, 2023
Kind
B2
Abstract

A semiconductor structure is disclosed. In one example, the semiconductor structure includes: a device region having at least one semiconductor device; a dummy region in contact with the device region; and at least one thermal conductor embedded in the dummy region.

Claims (47)

1. A semiconductor structure, comprising:

a plurality of semiconductor devices embedded in a device region;

at least one thermal conductor embedded in the device region;

a plurality of vertical interconnect accesses (vias) each of which is disposed in the device region and thermally couples the at least one thermal conductor to at least one surface of the semiconductor structure,

wherein the plurality of semiconductor devices and the plurality of vias share the following layers in a same order from bottom to top:

a contact layer formed of a first metal material,

a plurality of metal layers formed of a second metal material and formed on the contact layer, and

a top layer formed of a third metal material and formed on the plurality of metal layers, wherein the first metal material, the second metal material and the third metal material are different from each other.

2. The semiconductor structure of claim 1 , wherein embedding of the at least one thermal conductor increases an average thermal conductivity of the device region.

3. The semiconductor structure of claim 1 , wherein the at least one thermal conductor is formed of a thermally conductive material that thermally couples the plurality of semiconductor devices to the plurality of vias.

4. The semiconductor structure of claim 1 , wherein each of the plurality of vias thermally couples the at least one thermal conductor to at least one of the following on the at least one surface: a thermal bump, a heat sink, or a heat pipe.

5. The semiconductor structure of claim 1 , further comprising:

a substrate;

a bottom surface below the substrate; and

a top surface opposite to the bottom surface.

6. The semiconductor structure of claim 1 , wherein the at least one thermal conductor serves as at least one of the plurality of metal layers in the plurality of vias.

7. The semiconductor structure of claim 1 , wherein the plurality of semiconductor devices is in contact with a dummy region.

8. The semiconductor structure of claim 1 , wherein the plurality of semiconductor devices are contained within a cell phone.

9. The semiconductor structure of claim 1 , wherein:

the first metal material is tungsten;

the second metal material is copper; and

the third metal material is aluminum.

10. A method for forming a semiconductor structure, comprising:

forming a plurality of semiconductor devices on a semiconductor substrate;

forming at least one thermal conductor in a dummy region on the semiconductor substrate;

forming a plurality of vias in the dummy region, wherein each of the plurality of vias thermally couples the at least one thermal conductor to at least one surface of the semiconductor structure,

wherein the plurality of semiconductor devices and the plurality of vias share the following layers in a same order from bottom to top:

a contact layer formed of tungsten,

a plurality of metal layers formed of copper and formed on the contact layer, and

a top layer formed of aluminum and formed on the plurality of metal layers.

11. The method of claim 10 , wherein forming the at least one thermal conductor in the dummy region increases an average thermal conductivity of the dummy region.

12. The method of claim 10 , wherein the dummy region is in contact with the plurality of semiconductor devices.

13. The method of claim 10 , wherein the at least one thermal conductor is formed of a thermally conductive material that thermally couples the plurality of semiconductor devices to the plurality of vias.

14. The method of claim 10 , further comprising forming at least one of the following on the at least one surface: a thermal bump, a heat sink, or a heat pipe.

15. The method of claim 10 , wherein:

the semiconductor structure has a bottom surface below the substrate and a top surface opposite to the bottom surface.

16. A method for forming a semiconductor structure, comprising:

forming a plurality of semiconductor devices in at least one device region on a semiconductor substrate;

forming a plurality of vias in a dummy region on the semiconductor substrate, wherein each of the plurality of vias thermally couples the plurality of semiconductor devices to at least one surface of the semiconductor structure,

wherein the plurality of semiconductor devices and the plurality of vias share the following layers in a same order from bottom to top:

a contact layer formed of tungsten,

a plurality of metal layers formed of copper and formed on the contact layer, and

a top layer formed of aluminum and formed on the plurality of metal layers.

17. The method of claim 16 , wherein the dummy region is in contact with the at least one device region.

18. The method of claim 16 , wherein the plurality of vias comprises a thermally conductive material that increases an average thermal conductivity of the dummy region.

19. The method of claim 16 , further comprising forming at least one of the following on the at least one surface: a thermal bump, a heat sink, or a heat pipe.

20. The method of claim 16 , wherein the top layer is an interconnect layer formed of aluminum and formed on the plurality of metal layers.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 5, 2026
From: CHEN, S.L.; YEN, CHEN-HSUAN; LO, HAN-TANG
To: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
Reel/Frame 073979/0143 →
Continuity (2)
Continuation 15788696 · Oct 19, 2017
Related Publication 20210143078A1 · May 13, 2021
Cited By (1)
US 12,230,550