IP Library › Granted Patent US 11,800,701
Granted Patent B2
US 11,800,701 · App. 17/871,059 · Granted Oct 24, 2023

Method for fabricating semiconductor devices

Inventors: Ho Kyun An (Seoul, KR); Bumsoo Kim (Hwaseong-si, KR)
H10B12/09H01L21/02247H01L21/02252H01L21/28035H01L21/32H01L21/32155H10B12/053H10B12/315H10B12/34H10B12/50
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Quick Facts
Patent No.
US 11,800,701
App. No.
17/871,059
Granted
Oct 24, 2023
Kind
B2
Abstract

A method for fabricating a semiconductor device includes providing a substrate including a cell region and a core/peripheral region around the cell region, forming a gate insulating film on the substrate of the core/peripheral region, forming a first conductive film of a first conductive type on the gate insulating film, forming a diffusion blocking film within the first conductive film, the diffusion blocking film being spaced apart from the gate insulating film in a vertical direction, after forming the diffusion blocking film, forming an impurity pattern including impurities within the first conductive film, diffusing the impurities through a heat treatment process to form a second conductive film of a second conductive type and forming a metal gate electrode on the second conductive film, wherein the diffusion blocking film includes helium (He) and/or argon (Ar).

Claims (51)

1. A semiconductor device comprising:

a substrate comprising a cell region and a core/peripheral region around the cell region;

a gate insulating film on the core/peripheral region of the substrate;

a conductive film having a first conductive type on the gate insulating film;

a diffusion blocking film on the conductive film, the diffusion blocking film being spaced apart from the gate insulating film in a vertical direction;

an impurity pattern comprising impurities having a second conductive type different from the first conductive type on the diffusion blocking film; and

a metal gate electrode on the impurity pattern,

wherein the diffusion blocking film comprises helium (He) and/or argon (Ar).

2. The semiconductor device of claim 1 , wherein the impurities include at least one of boron (B) and phosphorus (P).

3. The semiconductor device of claim 1 , wherein the gate insulating film is a nitride film.

4. The semiconductor device of claim 1 , wherein a thickness of the diffusion blocking film is greater than a thickness of the conductive film.

5. The semiconductor device of claim 1 , wherein a thickness of the diffusion blocking film is less than a thickness of the conductive film.

6. The semiconductor device of claim 1 , wherein a concentration of He in the diffusion blocking film or a concentration of Ar in the diffusion blocking film decreases from an upper face of the diffusion blocking film toward to a lower face of the diffusion blocking film.

7. The semiconductor device of claim 1 , wherein a concentration of He in the conductive film or a concentration of Ar in the conductive film is 0.

8. The semiconductor device of claim 1 , wherein the diffusion blocking film is doped with He.

9. A semiconductor device comprising:

a substrate comprising a cell region and a core/peripheral region around the cell region, wherein the core/peripheral region comprises a first region and a second region;

a first gate insulating film on the first region;

a second gate insulating film on the second region;

a first conductive film having a first conductive type on the first gate insulating film;

a second conductive film having the first conductive type on the second gate insulating film;

a diffusion blocking film on the second conductive film on the second region, the diffusion blocking film being spaced apart from the second gate insulating film in a vertical direction;

an impurity pattern comprising impurities having a second conductive type different from the first conductive type on the diffusion blocking film on the second region;

a first metal gate electrode on the first conductive film on the first region; and

a second metal gate electrode on the impurity pattern on the second region,

wherein the diffusion blocking film is not on the first region, and

wherein the diffusion blocking film comprises helium (He) and/or argon (Ar).

10. The semiconductor device of claim 9 , wherein a thickness of the diffusion blocking film is greater than a thickness of the second conductive film.

11. The semiconductor device of claim 9 , wherein a thickness of the diffusion blocking film is less than a thickness of the second conductive film.

12. The semiconductor device of claim 9 , wherein a concentration of He in the diffusion blocking film or a concentration of Ar in the diffusion blocking film decreases from an upper face of the diffusion blocking film toward to a lower face of the diffusion blocking film.

13. The semiconductor device of claim 9 , wherein a concentration of He in the second conductive film or a concentration of Ar in the second conductive film is 0.

14. The semiconductor device of claim 9 , wherein the diffusion blocking film is doped with He.

15. A semiconductor device comprising:

a substrate comprising a cell region and a core/peripheral region around the cell region;

a gate insulating film on the core/peripheral region, wherein the gate insulating film is a nitride film;

a first conductive film having a first conductive type on the gate insulating film;

a bit line on the cell region, wherein the bit line comprises a second conductive film having the first conductive type, and a second metal gate electrode;

a capacitor on the cell region;

a diffusion blocking film on the first conductive film on the core/peripheral region, the diffusion blocking film being spaced apart from the gate insulating film in a vertical direction;

an impurity pattern comprising impurities having a second conductive type different from the first conductive type on the diffusion blocking film on the core/peripheral region; and

a first metal gate electrode on the impurity pattern on the core/peripheral region,

wherein the diffusion blocking film comprises helium (He) and/or argon (Ar), and

wherein a concentration of He in the diffusion blocking film or a concentration of Ar in the diffusion blocking film decreases from an upper face of the diffusion blocking film toward to a lower face of the diffusion blocking film.

16. The semiconductor device of claim 15 , further comprising:

a direct contact between the bit line and the cell region of the substrate, and

a buried contact electrically connected to the capacitor on the cell region of the substrate,

wherein the direct contact is electrically connected to the bit line.

17. The semiconductor device of claim 15 , wherein a thickness of the first metal gate electrode and a thickness of the second metal gate electrode are equal.

18. The semiconductor device of claim 15 , wherein a thickness of the diffusion blocking film is greater than a thickness of the first conductive film.

19. The semiconductor device of claim 15 , wherein a thickness of the diffusion blocking film is less than a thickness of the first conductive film.

20. The semiconductor device of claim 15 , wherein a concentration of He in the first conductive film or a concentration of Ar in the first conductive film is 0.

Priority Claims (1)
KR 10-2020-0131878 · Oct 13, 2020 · national
Continuity (2)
Continuation 17242932 · Apr 28, 2021
Related Publication 20220359533A1 · Nov 10, 2022
Cited By (1)
US 12,482,699