IP Library › Granted Patent US 11,830,800
Granted Patent B2
US 11,830,800 · App. 17/344,982 · Granted Nov 28, 2023

Metallization structure and package structure

Inventors: Chia-Kuei Hsu (Hsinchu, TW); Ming-Chih Yew (Hsinchu, TW); Shu-Shen Yeh (Taoyuan, TW); Po-Yao Lin (Hsinchu County, TW); Shin-Puu Jeng (Hsinchu, TW)
Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
H01L23/49838H01L23/49816H01L23/49822H01L24/16H01L21/561H01L21/568H01L2224/16225
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Quick Facts
Patent No.
US 11,830,800
App. No.
17/344,982
Granted
Nov 28, 2023
Kind
B2
Abstract

A metallization structure electrically connected to a conductive bump is provided. The metallization structure includes an oblong-shaped or elliptical-shaped redistribution pad, a conductive via disposed on the oblong-shaped or elliptical-shaped redistribution pad, and an under bump metallurgy covering the conductive via, wherein the conductive bump is disposed on the UBM. Furthermore, a package structure including the above-mentioned metallization structures is provided.

Claims (63)

1. A package structure, comprising:

a redistribution circuit structure comprising first metallization structures, each of the first metallization structures respectively comprising:

an oblong-shaped or elliptical-shaped redistribution pad;

a dielectric layer covering the oblong-shaped or elliptical-shaped redistribution pad;

a conductive via embedded in the dielectric layer and disposed on the oblong-shaped or elliptical-shaped redistribution pad;

an under bump metallurgy (UBM) disposed on the dielectric layer and covering the conductive via;

first conductive bumps disposed on the UBMs of the first metallization structures;

a semiconductor die disposed on the redistribution circuit structure and comprising second conductive bumps electrically connected to the first conductive bumps, wherein a die bonding area of the redistribution circuit structure covered by the semiconductor die is categorized into quadrants I, II, II, and IV by Cartesian coordinate with a center of the die bonding area as origin, wherein

an included angle between long axis of each of the oblong-shaped or elliptical-shaped redistribution pads located in quadrant I and quadrant III and x-axis of Cartesian coordinate is between 0° and 90° ,

an included angle between long axis of each of the oblong-shaped or elliptical-shaped redistribution pads located in quadrant II and quadrant IV and x-axis of Cartesian coordinate is between 90° and 180° .

2. The package structure of claim 1 , wherein long axis of each of the oblong-shaped or elliptical-shaped redistribution pads located on x-axis of Cartesian coordinate is substantially parallel with x-axis.

3. The package structure of claim 1 , wherein long axis of each of the oblong-shaped or elliptical-shaped redistribution pads located on y-axis of Cartesian coordinate is substantially parallel with y-axis.

4. The package structure of claim 1 , wherein the redistribution circuit structure further comprises a second metallization structure located at the center of the die bonding area, the second metallization structure comprises a central redistribution pad, and the central redistribution pad is smaller than the UBM.

5. The package structure of claim 1 , wherein long axes of the oblong-shaped or elliptical-shaped redistribution pads extend to pass through the center of the die bonding area.

6. The package structure of claim 1 further comprising:

a package substrate;

conductive terminals disposed between the package substrate and the redistribution circuit structure, wherein the redistribution circuit structure is electrically connected to the package substrate through the conductive terminals; and

an underfill disposed between the package substrate and the redistribution circuit structure, wherein the underfill laterally encapsulates the conductive terminals.

7. A package structure, comprising:

a redistribution circuit structure comprising first metallization structures, each of the first metallization structures respectively comprising:

an oblong-shaped or elliptical-shaped redistribution pad disposed on the first dielectric layer;

a dielectric layer covering the oblong-shaped or elliptical-shaped redistribution pad;

a conductive via embedded in the dielectric layer and disposed on the oblong-shaped or elliptical-shaped redistribution pad;

an under bump metallurgy (UBM) disposed on the dielectric layer and covering the conductive via;

first conductive bumps disposed on the UBMs of the first metallization structures;

a semiconductor die disposed on the redistribution circuit structure and comprising second conductive bumps electrically connected to the first conductive bumps, wherein a die bonding area of the redistribution circuit structure covered by the semiconductor die is categorized into quadrants I, II, II, and IV by Cartesian coordinate with a center of the die bonding area as origin, wherein

a first orientation of the oblong-shaped or elliptical-shaped redistribution pads located on quadrant I and quadrant III is different a second orientation of oblong-shaped or elliptical-shaped redistribution pads located on quadrant II and quadrant IV.

8. The package structure of claim 7 , wherein first long axes of the oblong-shaped or elliptical-shaped redistribution pads located on quadrant I and quadrant III are substantially parallel with each other,

second long axes of the oblong-shaped or elliptical-shaped redistribution pads located on quadrant II and quadrant IV are substantially parallel with each other, and the first long axes are different from the second long axes.

9. The package structure of claim 8 , wherein long axes of the oblong-shaped or elliptical-shaped redistribution pads located on x-axis are substantially parallel with x-axis.

10. The package structure of claim 8 , wherein long axes of the oblong-shaped or elliptical-shaped redistribution pads located on y-axis are substantially parallel with y-axis.

11. The package structure of claim 8 , wherein the redistribution circuit structure further comprises a second metallization structure located at the center of the die bonding area, the second metallization structure comprises a central redistribution pad, and the central redistribution pad is smaller than the UBM.

12. A package structure, comprising:

a redistribution circuit structure comprising first metallization structures, each of the first metallization structures respectively comprising:

an oblong-shaped or elliptical-shaped redistribution pad;

a dielectric layer covering the oblong-shaped or elliptical-shaped redistribution pad;

a conductive via embedded in the dielectric layer and disposed on the oblong-shaped or elliptical-shaped redistribution pad;

an under bump metallurgy (UBM) disposed on the dielectric layer and covering the conductive via;

first conductive bumps disposed on the UBMs of the first metallization structures;

a semiconductor die disposed on the redistribution circuit structure and comprising second conductive bumps electrically connected to the first conductive bumps, wherein a die bonding area of the redistribution circuit structure covered by the semiconductor die is categorized into quadrants I, II, II, and IV by Cartesian coordinate with a center of the die bonding area as origin, wherein an included angle between long axis of each of the oblong-shaped or elliptical-shaped redistribution pads located in quadrant I and quadrant III and x-axis of Cartesian coordinate is between 0° and 90° ,

an included angle between long axis of each of the oblong-shaped or elliptical-shaped redistribution pads located in quadrant II and quadrant IV and x-axis of Cartesian coordinate is between 90° and 180° ,

third conductive bumps disposed on the redistribution circuit structure, the third conductive bumps and the second conductive bumps being respectively disposed at opposite surfaces of the redistribution circuit structure, and the oblong-shaped or elliptical-shaped redistribution pad is not physically in contact with the third conductive bumps.

13. The package structure of claim 12 , wherein long axes of the oblong-shaped or elliptical-shaped redistribution pads extend to pass through the center of the die bonding area.

14. The package structure of claim 12 further comprising:

a package substrate;

conductive terminals disposed between the package substrate and the redistribution circuit structure, wherein the redistribution circuit structure is electrically connected to the package substrate through the conductive terminals; and

an underfill disposed between the package substrate and the redistribution circuit structure, wherein the underfill laterally encapsulates the conductive terminals.

15. The package structure of claim 12 , wherein the UBM comprises a circle-shaped UBM, A1 is a diameter of circle-shaped UBM, B1 is a length of the oblong-shaped or elliptical-shaped redistribution pad in short axis, B2 is a length of the oblong-shaped or elliptical-shaped redistribution pad in long axis, C is a diameter of conductive via, and A1, B1, B2 and C satisfy the following inequality (1):

B 2> A 1≥ B 1> C   (1).

16. The package structure of claim 15 , wherein A1 and C satisfy the following inequality (2):

6.4≥ A 1/ C≥ 1.5  (2).

17. The package structure of claim 15 , wherein A1, B1, and B2 satisfy the following inequalities (3)˜(5):

1≥ B 1/ A 1≥0.6  (3);

3≥ B 2/ A 1>1  (4); and

3≥ B 2/ B 1>1  (5).

18. The package structure of claim 12 , wherein the UBM comprises an octagon-shaped UBM, A2 is a distance between a pair of opposite sides of the octagon-shaped UBM, B1 is a length of the oblong-shaped or elliptical-shaped redistribution pad in short axis, B2 is a length of the oblong-shaped or elliptical-shaped redistribution pad in long axis, C is a diameter of conductive via, and A2, B1, B2 and C satisfy the following inequality (1):

B 2> A 1≥ B 1> C   (1).

19. The package structure of claim 18 , wherein A2 and C satisfy the following inequality (2):

6.4≥ A 1/ C≥ 1.5  (2).

20. The package structure of claim 18 , wherein A2, B1, and B2 satisfy the following inequalities (3)˜(5):

1≥ B 1/ A 1≥0.6  (3);

3≥ B 2/ A 1>1  (4); and

3≥ B 2/ B 1>1  (5).

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 23, 2021
From: HSU, CHIA-KUEI; YEW, MING-CHIH; YEH, SHU-SHEN; LIN, PO-YAO; JENG, SHIN-PUU
To: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
Reel/Frame 056626/0724 →
Continuity (2)
Provisional Application 63166232 · Mar 25, 2021
Related Publication 20220310503A1 · Sep 29, 2022
Cited By (1)
US 12,249,568