Solid-state imaging device and manufacturing method therefor
A solid-state imaging device includes a first and second pixel regions. In the first pixel region, a photoelectric conversion unit, a floating diffusion region (FD), and a transferring transistor are provided. In the second pixel region, an amplifying transistor, and a resetting transistor are provided. A first element isolation portion is provided in the first pixel region, while a second element isolation portion is provided in the second pixel region. An amount of protrusion of an insulating film into a semiconductor substrate in the first element isolation portion is smaller, than that in the second element isolation portion.
1. A device comprising:
a first semiconductor substrate; and
a second semiconductor substrate overlapping the first semiconductor substrate,
wherein
the first semiconductor substrate includes a first pixel region where a plurality of photoelectric conversion units included in a plurality of pixels are arranged;
wherein the second semiconductor substrate includes a second pixel region including a part of a pixel included in the plurality of pixels and a first peripheral circuit region arranged around the second pixel region;
wherein in plan view, the first pixel region overlaps the second pixel region, and
wherein in plan view, at least a part of the first peripheral circuit region does not overlap the first pixel region.
2. A device according to claim 1 ,
wherein each of the plurality of pixels includes a photoelectric conversion unit included in the plurality of photoelectric conversion units, a floating diffusion region, and a transfer transistor configured to transfer signal charge generated in the photoelectric conversion unit to the floating diffusion region.
3. A device according to claim 2 ,
wherein a signal based on the signal charge is outputted to an output line, and
wherein a constant current source is connected to the output line.
4. A device according to claim 1 ,
wherein a first peripheral circuit arranged in the first peripheral circuit region includes a signal processing circuit for processing a signal output from the plurality of pixels.
5. A device according to claim 4 ,
wherein the first peripheral circuit includes at least one of a vertical shift register, a column circuit unit, a signal holding unit, a horizontal shift register, and a difference amplifying unit.
6. A device according to claim 4 ,
wherein the first peripheral circuit includes an analog-to-digital converter.
7. A device according to claim 1 ,
wherein the first semiconductor substrate includes a second peripheral circuit region around the first pixel region, and
wherein in plan view, a first peripheral circuit arranged in the first peripheral circuit region overlaps the second peripheral circuit region.
8. A device according to claim 7 ,
wherein a second peripheral circuit arranged in the second peripheral circuit region includes a part of a shift register.
9. A device according to claim 7 ,
wherein a connection portion between the first peripheral circuit and a second peripheral circuit arranged in the second peripheral circuit region is provided in a region overlapping the first peripheral circuit region in plan view.
10. A device according to claim 1 ,
wherein a connection portion between the first substrate and the second substrate is provided in a region overlapping the first peripheral circuit region in plan view.
11. A device comprising:
a first semiconductor substrate; and
a second semiconductor substrate overlapping the first semiconductor substrate,
wherein the first semiconductor substrate includes a first pixel region where a plurality of photoelectric conversion units included in a plurality of pixels are arranged;
wherein the second semiconductor substrate includes a second pixel region to which a signal based on signal charges generated in at least one of the photoelectric conversion units is input, and a first peripheral circuit region arranged around the second pixel region;
wherein in plan view, the first pixel region overlaps the second pixel region, and
wherein in plan view, at least a part of the first peripheral circuit region does not overlap the first pixel region.
12. A device according to claim 11 ,
wherein each of the plurality of pixels includes a photoelectric conversion unit included in the plurality of photoelectric conversion units, a floating diffusion region, and a transfer transistor configured to transfer signal charge generated in the photoelectric conversion unit to the floating diffusion region.
13. A device according to claim 12 ,
wherein a signal based on the signal charge is outputted to an output line, and
wherein a constant current source is connected to the output line.
14. A device according to claim 11 ,
wherein a first peripheral circuit arranged in the first peripheral circuit region includes a signal processing circuit for processing a signal based on signal charges generated in at least one of the plurality of pixels.
15. A device according to claim 14 ,
wherein the first peripheral circuit includes at least one of a vertical shift register, a column circuit unit, a signal holding unit, a horizontal shift register, and a difference amplifying unit.
16. A device according to claim 14 ,
wherein the first peripheral circuit includes an analog-to-digital converter.
17. A device according to claim 11 ,
wherein the first semiconductor substrate includes a second peripheral circuit region around the first pixel region, and
wherein in plan view, the first peripheral circuit region overlaps the second peripheral circuit region.
18. A device according to claim 17 ,
wherein a second peripheral circuit arranged in the second peripheral circuit region includes a part of a shift register.
19. A device according to claim 17 ,
wherein a connection portion between the first peripheral circuit and a second peripheral circuit arranged in the second peripheral circuit is provided in a region overlapping the first peripheral circuit region in plan view.
20. A device according to claim 11 ,
wherein a connection portion between the first substrate and the second substrate is provided in a region overlapping the first peripheral circuit region in plan view.