IP Library › Granted Patent US 11,888,094
Granted Patent B2
US 11,888,094 · App. 17/445,691 · Granted Jan 30, 2024

Flip-chip LED structure and fabrication method

Inventors: Anhe He (Xiamen, CN); Su-hui Lin (Xiamen, CN); Jiansen Zheng (Xiamen, CN); Kangwei Peng (Xiamen, CN); Xiaoxiong Lin (Xiamen, CN); Chen-ke Hsu (Xiamen, CN)
Assignee: QUANZHOU SANAN SEMICONDUCTOR TECHNOLOGY CO., LTD.
H01L33/46H01L33/20H01L33/38H01L33/44H01L33/405H01L2933/0016H01L2933/0025
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Quick Facts
Patent No.
US 11,888,094
App. No.
17/445,691
Granted
Jan 30, 2024
Kind
B2
Abstract

A flip-chip light emitting diode (LED) includes: a sapphire substrate having an edge; an epitaxial layer over the substrate, wherein the epitaxial layer comprises: a first semiconductor layer, a second semiconductor layer, and a light emitting layer between the first semiconductor layer and the second semiconductor layer, wherein the epitaxial layer is divided into an epitaxial bulk layer and a barrier structure; and an insulating layer over the epitaxial bulk layer, wherein a portion of the insulating layer that covers a sidewall of the epitaxial bulk layer is separated from the edge of the substrate by the barrier structure.

Claims (19)

1. A flip-chip light emitting diode (LED) comprising:

a sapphire substrate having a lateral vertical edge;

an epitaxial layer over the sapphire substrate, wherein the epitaxial layer comprises: a first semiconductor layer, a second semiconductor layer, and a light emitting layer between the first semiconductor layer and the second semiconductor layer, wherein the epitaxial layer is divided into an epitaxial bulk layer and a barrier structure; and

an insulating layer over the epitaxial bulk layer, wherein a portion of the insulating layer that covers a sidewall of the epitaxial bulk layer is separated from the lateral vertical edge of the sapphire substrate by the barrier structure; and wherein the insulating layer is a distributed Bragg reflective layer, which is formed over the epitaxial layer prior to forming at least one opening structure.

2. The flip-chip LED of claim 1 , the at least one opening structure further comprising a plurality of opening structures at an edge of the epitaxial layer and extending to a surface of the sapphire substrate, thereby exposing a portion of a sidewall of the epitaxial layer and a portion of the surface of the sapphire substrate, such that the epitaxial bulk layer is completely isolated from the barrier structure and is different from the barrier structure.

3. The flip-chip LED of claim 2 , wherein the plurality of opening structures comprise at least one of a “U”-shaped, a “V”-shaped, or a “W”-shaped opening.

4. The flip-chip LED of claim 1 , further comprising a metal electrode formed over the epitaxial layer after the insulating layer is formed.

5. A fabrication method of the flip-chip LED of claim 1 , the method comprising:

providing the sapphire substrate;

fabricating the epitaxial layer over the sapphire substrate, wherein the epitaxial layer comprises: a first semiconductor layer, a second semiconductor layer, and a light emitting layer between the first semiconductor layer and the second semiconductor layer;

etching at least one opening structure downward from a surface of the epitaxial layer, to a surface of the sapphire substrate, thereby exposing the portion of the side wall of the epitaxial layer and the portion of the surface of the sapphire substrate, such that the epitaxial layer is divided into the epitaxial bulk layer and the barrier structure; and

depositing the insulating layer on the at least one opening structure as a metal electrode isolating layer.

6. The fabrication method of claim 5 , wherein the barrier structure is configured to avoid short-circuit of the flip-chip LED caused by overflow of solder paste or other solid crystal conductive materials during usage of the flip-chip LED and improve reliability and yield of the flip-chip LED.

7. The fabrication method of claim 6 , wherein the plurality of opening structures comprise at least one of a “U”-shaped, a “V”-shaped, or a “W”-shaped opening.

8. The fabrication method of claim 7 , further comprising forming the distributed Bragg reflective layer over the epitaxial layer prior to forming the at least one opening structure.

9. The fabrication method of claim 8 , further comprising forming a metal electrode over the epitaxial layer after the insulating layer is formed.

10. The fabrication method of claim 9 , wherein the insulating layer is formed over the at least one opening structure and covering the exposed portion of the sidewall of the epitaxial layer and the exposed portion of the surface of the sapphire substrate.

11. The fabrication method of claim 10 , wherein the distributed Bragg reflective layer comprises alternatingly stacked SiO 2 and TiO 2 layers.

12. The fabrication method of claim 8 , wherein the distributed Bragg reflective layer is discontinuous at least laterally over a bottom of the at least one plurality of opening structures and is present between two of the plurality of opening structures.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 19, 2023
From: XIAMEN SANAN OPTOELECTRONICS TECHNOLOGY CO., LTD.
To: QUANZHOU SANAN SEMICONDUCTOR TECHNOLOGY CO., LTD.
Reel/Frame 065277/0826 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 23, 2021
From: HE, ANHE; LIN, SU-HUI; ZHENG, JIANSEN; PENG, KANGWEI; LIN, XIAOXIONG; HSU, CHEN-KE
To: XIAMEN SANAN OPTOELECTRONICS TECHNOLOGY CO., LTD.
Reel/Frame 057261/0390 →
Priority Claims (1)
CN 201410248717.8 · Jun 6, 2014 · national
Continuity (3)
Continuation 15236434 · Aug 13, 2016
Continuation PCTCN2014094876 · Dec 25, 2014
Related Publication 20210384383A1 · Dec 9, 2021