IP Library › Granted Patent US 11,908,868
Granted Patent B2
US 11,908,868 · App. 17/748,633 · Granted Feb 20, 2024

Semiconductor device

Inventors: Katsuhisa Nagao (Kyoto, JP); Noriaki Kawamoto (Kyoto, JP)
Assignee: ROHM CO., LTD.
H01L27/11898H01L23/528H01L27/11807H01L27/11896H01L29/1608H01L29/42372H01L29/7395H01L29/7397H01L29/7803H01L29/7811H01L29/7813H01L23/53214H01L23/53219H01L23/53228H01L23/53233H01L29/0615H01L29/0696H01L29/1095H01L29/4236H01L29/4238H01L29/78H01L2027/11866
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Quick Facts
Patent No.
US 11,908,868
App. No.
17/748,633
Granted
Feb 20, 2024
Kind
B2
Abstract

A semiconductor device ( 1 ) is manufactured which includes a SiC epitaxial layer ( 28 ), a plurality of transistor cells ( 18 ) that are formed in the SiC epitaxial layer ( 28 ) and that are subjected to ON/OFF control by a predetermined control voltage, a gate electrode ( 19 ) that faces a channel region ( 32 ) of the transistor cells ( 18 ) in which a channel is formed when the semiconductor device ( 1 ) is in an ON state, a gate metal ( 44 ) that is exposed at the topmost surface for electrical connection with the outside and that is electrically connected to the gate electrode ( 19 ) while being physically separated from the gate electrode ( 19 ), and a built-in resistor ( 21 ) that is made of polysilicon and that is disposed below the gate metal ( 44 ) so as to electrically connect the gate metal ( 44 ) and the gate electrode ( 19 ) together.

Claims (26)

1. A semiconductor device comprising:

a semiconductor layer;

a plurality of cells that are formed in the semiconductor layer;

a control pad for electric connection for controlling the semiconductor device,

a pad peripheral portion formed around the control pad to surround the control pad continuously;

a built-in resistor that is disposed partly below the control pad and that is made of polysilicon, the built-in resistor electrically connecting the control pad with the pad peripheral portion; and

a plurality of source pads for electric connection,

wherein the control pad is isolated from the pad peripheral portion physically in a same layer so that a space is formed between the control pad and the pad peripheral portion, and the control pad is formed around the edge portion of the semiconductor device,

a connecting portion to which a connecting member is adapted to be connected is selectively formed on a surface of the control pad, and

the built-in resistor is selectively disposed in a region that avoids the connecting portion in a plain view,

wherein the control pad is made of a material containing aluminum, the pad peripheral portion is made of a material containing aluminum, and each of said source pads is made of a material containing aluminum.

2. The semiconductor device according to claim 1 , wherein the connection portion occupies more than half of the area of the control pad in a plan view.

3. The semiconductor device according to claim 1 , further comprising a gate finger extending from the pad peripheral portion.

4. The semiconductor device according to claim 3 , wherein the gate finger extends in three directions from the pad peripheral portion.

5. The semiconductor device according to claim 4 , wherein the gate finger has a portion extending to four corners of the semiconductor device.

6. The semiconductor device according to claim 5 , wherein a width of the gate finger is narrower than a width of the built-in resistor.

7. The semiconductor device according to claim 1 , wherein the built-in resistor has a rectangular shape in a plan view.

8. The semiconductor device according to claim 1 , wherein semiconductor device has a rectangular shape in a plan view, and

the control pad is provided in the vicinity of the center of one side of the semiconductor device in a plan view.

9. The semiconductor device according to claim 1 , wherein the pad peripheral portion has the same thickness as the control pad.

10. The semiconductor device according to claim 1 , wherein the built-in resistor is disposed in a region partially below the control pad with an interlayer film selectively disposed between the built-in resistor and the control pad.

11. The semiconductor device according to claim 1 , wherein the connection portion is formed in a central portion of the control pad.

12. The semiconductor device according to claim 1 , wherein at least a part of the built-in resistor is disposed in a lower region of the control pad.

13. The semiconductor device according to claim 1 , wherein the semiconductor layer is made of SiC.

14. The semiconductor device according to claim 1 , wherein the built-in resistor has a portion that overlaps with one of the corners of the control pad in a plan view.

15. The semiconductor device according to claim 1 , wherein a thickness direction distance between the built-in resistor and the control pad is equal to a thickness direction distance between the built-in resistor and the pad peripheral portion.

Priority Claims (1)
JP 2013-246474 · Nov 28, 2013 · national
Continuity (5)
Continuation 17109676 · Dec 2, 2020
Continuation 16555843 · Aug 29, 2019
Continuation 15883690 · Jan 30, 2018
Division 15039725
Related Publication 20220278133A1 · Sep 1, 2022