IP Library › Granted Patent US 12,010,933
Granted Patent B2
US 12,010,933 · App. 17/977,317 · Granted Jun 11, 2024

Via structure and methods of forming the same

Inventors: Wei-Chieh Huang (Hsinchu County, TW); Jieh-Jang Chen (Hsinchu County, TW); Feng-Jia Shiu (Hsinchu County, TW); Chern-Yow Hsu (Hsin-Chu County, TW)
Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
H10N70/8418H01L21/28562H01L21/28568H01L21/31053H01L21/31144H01L21/3212H01L21/76879H10B63/80H10N70/021H10N70/063H10N70/231H10N70/826H10N70/8413H10N70/8828H10N70/8833
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Quick Facts
Patent No.
US 12,010,933
App. No.
17/977,317
Granted
Jun 11, 2024
Kind
B2
Abstract

A method includes providing a substrate having a conductive column, a dielectric layer over the conductive column, and a plurality of sacrificial blocks over the dielectric layer, the plurality of sacrificial blocks surrounding the conductive column from a top view; depositing a sacrificial layer covering the plurality of sacrificial blocks, the sacrificial layer having a dip directly above the conductive column; depositing a hard mask layer over the sacrificial layer; removing a portion of the hard mask layer from a bottom of the dip; etching the bottom of the dip using the hard mask layer as an etching mask, thereby exposing a top surface of the conductive column; and forming a conductive material inside the dip, the conductive material being in physical contact with the top surface of the conductive column.

Claims (44)

1. A method comprising:

forming a first dielectric layer over a first electrode layer;

forming a patterned second dielectric layer over the first dielectric layer;

forming a sacrificial layer on the patterned second dielectric layer;

forming a trench through the sacrificial layer that exposes the first electrode layer;

forming a conductive material in the trench; and

after forming the conductive material in the trench, removing at least a first portion of the sacrificial layer and at least a first portion of the patterned second dielectric layer to expose a portion of the first dielectric layer.

2. The method of claim 1 , further comprising:

forming a phase-changing material layer on the conductive material; and

forming a second electrode layer on the phase-changing material.

3. The method of claim 1 , further comprising forming a hard mask layer directly on the sacrificial layer prior to forming the trench through the sacrificial layer that exposes the first electrode layer.

4. The method of claim 3 , wherein the forming of the trench through the sacrificial layer that exposes the first electrode layer includes removing a first portion of the hard mask layer, a second portion of the sacrificial layer and a second portion of the first dielectric layer.

5. The method of claim 1 , wherein the sacrificial layer is formed of a dielectric material that has the same composition as the patterned second dielectric layer.

6. The method of claim 1 , wherein the sacrificial layer is formed of a dielectric material that has a different composition than the patterned second dielectric layer.

7. The method of claim 1 , wherein the forming of the sacrificial layer on the patterned second dielectric layer includes forming the sacrificial layer directly on the patterned second dielectric layer and the first dielectric layer.

8. The method of claim 1 , wherein a top surface of the conductive material is substantially coplanar with a top surface of the first dielectric layer after the removing of at least the first portion of the sacrificial layer and at least the first portion of the patterned second dielectric layer to expose the portion of the first dielectric layer.

9. A method comprising:

providing a substrate having a first conductive feature disposed therein;

forming a first dielectric layer on the first conductive feature;

forming a patterned second dielectric layer on the first dielectric layer;

forming a third dielectric layer on the patterned second dielectric layer;

forming an opening through the third dielectric layer to the first conductive feature;

forming a first conductive material in the opening directly on the first conductive feature; and

performing a planarization process on the first conductive material, the third dielectric layer, and the patterned second dielectric layer to expose a top surface of the first dielectric layer.

10. The method of claim 9 , wherein a portion of the first conductive material is disposed within the first dielectric layer and in physical contact with the first conductive feature after the performing of the planarization process.

11. The method of claim 9 , wherein the patterned second dielectric layer includes a plurality of segments that are spaced apart from each other and at least partially surround the first conductive feature in a top view.

12. The method of claim 9 , wherein the forming of the first dielectric layer on the first conductive feature includes forming the first dielectric layer directly on the first conductive feature.

13. The method of claim 9 , further comprising forming a semiconductor material layer directly on the first conductive material after the performing of the planarization process.

14. The method of claim 13 , further comprising forming a second conductive material directly on the semiconductor layer.

15. The method of claim 14 , further comprising:

patterning the second conductive material and the semiconductor material layer; and

forming a second dielectric layer directly on the patterned second conductive material and the patterned semiconductive material layer.

16. A method comprising:

providing a first electrode layer;

forming a first material layer on the first electrode layer;

forming a second material layer on the first material layer;

patterning the second material layer to form a first segment and a second segment of the second material layer;

forming a third material layer on the first and second segments of the second material layer such that the first and second segments of the second material layer are at least partially disposed within the third material layer;

forming a conductive feature through the first and second segments of the second material layer to the first electrode layer;

removing the third material layer, a first portion of the conductive feature and the first and second segments of the second material layer.

17. The method of claim 16 , wherein a second portion of the conductive feature is disposed within the first material layer and in physical contact with the first electrode layer after the removing of the third material layer, the first portion of the conductive feature and the first and second segments of the second material layer.

18. The method of claim 16 , further comprising forming a phase-changing material directly on a second portion of the conductive feature that remains after the removing of the third material layer, the first portion of the conductive feature and the first and second segments of the second material layer.

19. The method of claim 18 , further comprising forming a second electrode layer directly on the phase-changing material.

20. The method of claim 16 , wherein the second material layer is formed of a different material than the third material layer.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 31, 2023
From: HUANG, WEI-CHIEH; CHEN, JIEH-JANG; SHIU, FENG-JIA; HSU, CHERN-YOW
To: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
Reel/Frame 062548/0605 →
Continuity (5)
Continuation 17306626 · May 3, 2021
Continuation 16594306 · Oct 7, 2019
Continuation 15884505 · Jan 31, 2018
Provisional Application 62583866 · Nov 9, 2017
Related Publication 20230059026A1 · Feb 23, 2023
Cited By (1)
US 12,635,219