Bond pad with micro-protrusions for direct metallic bonding
A bond pad with micro-protrusions for direct metallic bonding. In one embodiment, a semiconductor device comprises a semiconductor substrate, a through-silicon via (TSV) extending through the semiconductor substrate, and a copper pad electrically connected to the TSV and having a coupling side. The semiconductor device further includes a copper element that projects away from the coupling side of the copper pad. In another embodiment, a bonded semiconductor assembly comprises a first semiconductor substrate with a first TSV and a first copper pad electrically coupled to the first TSV, wherein the first copper pad has a first coupling side. The bonded semiconductor assembly further comprises a second semiconductor substrate, opposite to the first semiconductor substrate, the second semiconductor substrate comprising a second copper pad having a second coupling side. A plurality of copper connecting elements extend between the first and second coupling sides of the first and second copper pads.
1. A semiconductor device, comprising:
a first semiconductor substrate having:
a first through-silicon via (TSV),
a dual-damascene first bond pad having a first base directly coupled to the first TSV and a first pad wider than the first base and separated from a first semiconductor material of the first semiconductor substrate by a first region of a first dielectric material surrounding the first base, wherein the first base and the first pad seamlessly comprise the dual-damascene first bond pad, and
a first plurality of bonding features projecting away from the first pad of the first bond pad and separated from one another by a second region of the first dielectric material; and
a second semiconductor substrate having:
a second TSV,
a dual-damascene second bond pad having a second base directly coupled to the second TSV and a second pad wider than the second base and separated from a second semiconductor material of the second semiconductor substrate by a first region of a second dielectric material surrounding the second base, wherein the second base and the second pad seamlessly comprise the dual-damascene second bond pad, and
a second plurality of bonding features projecting away from the second pad of the second bond pad and separated from one another by a second region of the second dielectric material,
wherein each of the first plurality of bonding features is directly connected to a corresponding one of the second plurality of bonding features by a metal-to-metal bond, and
further comprising a first homogenous structure comprising the first dielectric material, the first homogenous structure underlying the first pad, overlying the first pad, and at least partially surrounding the first plurality of bonding features, and a second homogenous structure comprising the second dielectric material, the second homogenous structure underlying the second pad, overlying the second pad, and at least partially surrounding the second plurality of bonding features.
2. The semiconductor device of claim 1 , wherein the first and second pluralities of bonding features comprise metallic elements.
3. The semiconductor device of claim 1 , wherein the first and second pluralities of bonding features comprise corresponding first and second pluralities of pillars.
4. The semiconductor device of claim 1 , wherein the first and second pads each comprise copper, and wherein the first and second pluralities of bonding features each comprise copper.
5. The semiconductor device of claim 1 , wherein each of the first plurality of bonding features and each of the second plurality of bonding features has a cross sectional dimension of between 0.5 and 5 microns.
6. The semiconductor device of claim 1 , wherein the first homogenous structure of the first dielectric material contacts the second homogenous structure of the second dielectric material in a bonding plane in which each of the first plurality of bonding features directly contacts the corresponding one of the second plurality of bonding features.
7. The semiconductor device of claim 1 , wherein the first semiconductor material and the second semiconductor material have a same material composition.
8. The semiconductor device of claim 1 , wherein the first TSV and the second TSV are vertically aligned.
9. The semiconductor device of claim 1 , wherein each of the first plurality of bonding features includes a first deformed end region in contact with a second deformed end region of the corresponding one of the second plurality of bonding features.