IP Library › Granted Patent US 12,149,218
Granted Patent B2
US 12,149,218 · App. 18/308,939 · Granted Nov 19, 2024

Power amplifiers with adaptive bias for envelope tracking applications

Inventors: Aleksey A. Lyalin (Moorpark, CA); Huiming Xu (Newbury Park, CA); Shayan Farahvash (Kensington, CA); Georgios Palaskas (Portland, OR)
Assignee: Skyworks Solutions, Inc.
H03F3/245H03F1/0233H04B1/38H03F2200/105H03F2200/451
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Quick Facts
Patent No.
US 12,149,218
App. No.
18/308,939
Granted
Nov 19, 2024
Kind
B2
Abstract

Power amplifiers with adaptive bias for envelope tracking applications are provided herein. In certain embodiments, an envelope tracking system includes a power amplifier that amplifies a radio frequency (RF) signal and that receives power from a power amplifier supply voltage, and an envelope tracker that controls a voltage level of the power amplifier supply voltage based on an envelope of the RF signal. The power amplifier includes a current mirror having an input that receives a reference current, an output electrically connected to the power amplifier supply voltage, and a node that outputs a gate bias voltage. The power amplifier further includes a field-effect transistor that amplifies the radio frequency signal and a first depletion-mode transistor having a gate connected to the node of the current mirror and a source connected to a gate of the field-effect transistor.

Claims (32)

1. A mobile device comprising:

a transceiver configured to generate a radio frequency signal;

a power management system including an envelope tracker configured to control a voltage level of a power amplifier supply voltage based on an envelope of the radio frequency signal; and

a front end system including a power amplifier transistor configured to amplify the radio frequency signal and to receive power from the power amplifier supply voltage, and a current mirror configured to generate a bias voltage for the power amplifier transistor at a node, the current mirror including a first mirror transistor having a drain connected to the node, a second mirror transistor having a gate connected to a gate of the first minor transistor, a third mirror transistor having a source connected to the node, and a fourth mirror transistor having a gate connected to a gate of the third mirror transistor and a drain that receives the power amplifier supply voltage, the front end system further including a buffer including a first depletion-mode transistor having a gate connected to the node of the current mirror and a source connected to a gate of the power amplifier transistor.

2. The mobile device of claim 1 wherein the front end system further includes a current source configured to provide a reference current to a drain of the third mirror transistor.

3. The mobile device of claim 1 wherein a drain of the second mirror transistor is connected to a source of the fourth mirror transistor.

4. The mobile device of claim 3 wherein a drain of the third mirror transistor is connected to the gate of the third minor transistor, and the drain of the second mirror transistor is connected to the gate of the second mirror transistor.

5. The mobile device of claim 1 wherein the gate of the power amplifier transistor further receives the radio frequency signal.

6. The mobile device of claim 1 wherein the buffer further includes a second depletion-mode transistor having a drain connected to the gate of the power amplifier transistor.

7. The mobile device of claim 1 further comprising a battery, the first depletion-mode transistor having a drain that receives a battery voltage from the battery.

8. An envelope tracking system comprising:

an envelope tracker configured to control a voltage level of a power amplifier supply voltage based on an envelope of a radio frequency signal;

a power amplifier transistor configured to amplify the radio frequency signal and to receive power from the power amplifier supply voltage;

a current mirror configured to generate a bias voltage for the power amplifier transistor at a node, the current minor including a first minor transistor having a drain connected to the node, a second mirror transistor having a gate connected to a gate of the first mirror transistor, a third mirror transistor having a source connected to the node, and a fourth mirror transistor having a gate connected to a gate of the third mirror transistor and a drain that receives the power amplifier supply voltage; and

a buffer including a first depletion-mode transistor having a gate connected to the node of the current minor and a source connected to a gate of the power amplifier transistor.

9. The envelope tracking system of claim 8 further comprising a current source configured to provide a reference current to a drain of the third minor transistor.

10. The envelope tracking system of claim 8 wherein a drain of the second mirror transistor is connected to a source of the fourth mirror transistor.

11. The envelope tracking system of claim 10 wherein a drain of the third mirror transistor is connected to the gate of the third minor transistor, and the drain of the second mirror transistor is connected to the gate of the second mirror transistor.

12. The envelope tracking system of claim 8 wherein the gate of the power amplifier transistor further receives the radio frequency signal.

13. The envelope tracking system of claim 8 wherein the buffer further includes a second depletion-mode transistor having a drain connected to the gate of the power amplifier transistor.

14. The envelope tracking system of claim 8 further comprising a battery, the first depletion-mode transistor having a drain that receives a battery voltage from the battery.

15. A method of radio frequency signal amplification in a mobile device, the method comprising:

controlling a voltage level of a power amplifier supply voltage based on an envelope of a radio frequency signal using an envelope tracker;

powering a power amplifier transistor using the power amplifier supply voltage;

amplifying the radio frequency signal using the power amplifier transistor;

biasing the power amplifier transistor using bias voltage provided by a current mirror at a node, the current mirror including a first mirror transistor having a drain connected to the node, a second mirror transistor having a gate connected to a gate of the first mirror transistor, a third mirror transistor having a source connected to the node, and a fourth mirror transistor having a gate connected to a gate of the third mirror transistor and a drain that receives the power amplifier supply voltage; and

buffering the bias voltage using a buffer that includes a first depletion-mode transistor having a gate connected to the node of the current mirror and a source connected to a gate of the power amplifier transistor.

16. The method of claim 15 further comprising providing a reference current to a drain of the third minor transistor.

17. The method of claim 15 further comprising receiving the radio frequency signal at the gate of the power amplifier transistor.

18. The method of claim 15 wherein the buffer further includes a second depletion-mode transistor having a drain connected to the gate of the power amplifier transistor.

19. The method of claim 15 further comprising receiving a battery voltage from a battery at a drain of the first depletion-mode transistor.

20. The method of claim 15 wherein a drain of the second mirror transistor is connected to a source of the fourth minor transistor, a drain of the third mirror transistor is connected to the gate of the third minor transistor, and the drain of the second mirror transistor is connected to the gate of the second mirror transistor.

Continuity (4)
Continuation 17934340 · Sep 22, 2022
Continuation 17302953 · May 17, 2021
Provisional Application 62704972 · Jun 5, 2020
Related Publication 20230291370A1 · Sep 14, 2023
Cited By (1)
US 12,556,150