Integrated circuit with latch-up immunity
View Patent ↗Various embodiments of the present disclosure are directed towards a method for forming an integrated chip. The method includes forming an epitaxial structure having a first doping type over a first portion of a semiconductor substrate. A second portion of the semiconductor substrate is formed over the epitaxial structure and the first portion of the semiconductor substrate. A first doped region having the first doping type is formed in the second portion of the semiconductor substrate and directly over the epitaxial structure. A second doped region having a second doping type opposite the first doping type is formed in the second portion of the semiconductor substrate, where the second doped region is formed on a side of the epitaxial structure. A plurality of fins of the semiconductor substrate are formed by selectively removing portions of the second portion of the semiconductor substrate.
1. An integrated chip (IC) comprising a first region and a second region disposed on a first side of the first region, the IC comprising:
a semiconductor substrate;
a first fin of the semiconductor substrate disposed in the first region of the IC;
a second fin of the semiconductor substrate disposed in the second region of the IC and laterally spaced from the first fin;
a first doped region disposed in the semiconductor substrate and in the first region of the IC, wherein the first doped region has a first doping type;
a second doped region disposed in the semiconductor substrate and in the second region of the IC, wherein the second doped region has a second doping type opposite the first doping type; and
an epitaxial structure having the first doping type disposed in the semiconductor substrate and contacting the first doped region, wherein the epitaxial structure is disposed in the first region of the IC and vertically between the first doped region and a lower surface of the semiconductor substrate, wherein the epitaxial structure has a higher doping concentration of first doping type dopants than the first doped region, wherein an upper surface of the semiconductor substrate extends laterally between the first fin and the second fin, and wherein the upper surface of the semiconductor substrate is vertically spaced from the epitaxial structure.
2. The IC of claim 1 , wherein:
the epitaxial structure has a sidewall disposed laterally between the first fin and the second fin; and
the upper surface of the semiconductor substrate overlies the sidewall of the epitaxial structure.
3. The IC of claim 1 , wherein:
the first doped region is disposed in a portion of the semiconductor substrate;
the portion of the semiconductor substrate is disposed in the first region of the IC;
the portion of the semiconductor substrate overlies the epitaxial structure; and
the first fin overlies the portion of the semiconductor substrate.
4. The IC of claim 1 , wherein:
the epitaxial structure has a thickness;
a lower surface of the epitaxial structure is spaced from the lower surface of the semiconductor substrate by a distance; and
a ratio of the thickness to the distance is between 1:200 and 1:800.
5. The IC of claim 1 , wherein:
the first fin has a height;
the epitaxial structure has a thickness; and
a ratio of the height to the thickness is between 1:10 and 1:600.
6. An integrated chip (IC) comprising:
a semiconductor substrate having a lower portion and an upper portion, wherein the upper portion of the semiconductor substrate overlies the lower portion of the semiconductor substrate;
a first fin of the semiconductor substrate disposed in a first region of the upper portion of the semiconductor substrate;
a second fin of the semiconductor substrate disposed in a second region of the upper portion of the semiconductor substrate, wherein the second fin is laterally spaced from the first fin;
a first doped region disposed in the first region of the upper portion of the semiconductor substrate, wherein the first doped region has a first doping type;
a second doped region disposed in the second region of the upper portion of the semiconductor substrate, wherein the second doped region has a second doping type opposite the first doping type; and
an epitaxial structure having the first doping type disposed in the semiconductor substrate, wherein the epitaxial structure is disposed vertically between the upper portion of the semiconductor substrate and the lower portion of the semiconductor substrate, wherein a sidewall of the epitaxial structure is disposed laterally between the first fin and the second fin, wherein an upper surface of the upper portion of the semiconductor substrate overlies the epitaxial structure, and wherein the upper surface of the upper portion of the semiconductor substrate is disposed vertically between an uppermost surface of the first fin and the epitaxial structure.
7. The IC of claim 6 , wherein:
the first doped region overlies the epitaxial structure; and
the second doped region is disposed on a side of the epitaxial structure.
8. The IC of claim 6 , wherein:
the first doped region is disposed at least partially in the first fin; and
the second doped region is disposed at least partially in the second fin.
9. The IC of claim 6 , wherein:
a side of the first doped region contacts a side of the second doped region laterally between the first fin and the second fin.
10. The IC of claim 9 , wherein:
the side of the first doped region contacts the side of the second doped region at a point in the upper portion of the semiconductor substrate; and
the point in the upper portion of the semiconductor substrate is disposed vertically between the epitaxial structure and the first fin.
11. The IC of claim 10 , wherein the point in the upper portion of the semiconductor substrate is disposed vertically between an uppermost surface of the epitaxial structure and the first fin.
12. The IC of claim 6 , wherein the first fin protrudes vertically beyond the upper surface of the upper portion of the semiconductor substrate.
13. The IC of claim 12 , wherein a segment of the first region of the upper portion of the semiconductor substrate is disposed vertically between the upper surface of the upper portion of the semiconductor substrate and the epitaxial structure.
14. An integrated chip (IC) comprising:
a semiconductor substrate;
an epitaxial structure having a first doping type disposed in the semiconductor substrate, wherein the epitaxial structure is vertically spaced from an uppermost surface of the semiconductor substrate and vertically spaced from a lowermost surface of the semiconductor substrate;
a first plurality of fins of the semiconductor substrate disposed in a first region of the semiconductor substrate, wherein the first region of the semiconductor substrate overlies the epitaxial structure, and wherein a perimeter of the first region of the semiconductor substrate corresponds to a perimeter of the epitaxial structure;
a second plurality of fins of the semiconductor substrate disposed in a second region of the semiconductor substrate, wherein the second region of the semiconductor substrate is disposed over the epitaxial structure and disposed outside the perimeter of the first region of the semiconductor substrate;
a first doped region disposed in the first region of the semiconductor substrate, wherein the first doped region has the first doping type, and wherein the first doped region is disposed in a first portion of the first region of the semiconductor substrate, and wherein the first portion of the first region of the semiconductor substrate is disposed vertically between the epitaxial structure and the first plurality of fins; and
a second doped region disposed in the second region of the semiconductor substrate, wherein the second doped region has a second doping type opposite the first doping type.
15. The IC of claim 14 , wherein the first portion of the first region of the semiconductor substrate extends laterally along an upper surface of the epitaxial structure.
16. The IC of claim 14 , wherein:
the first plurality of fins has a first fin density per a unit of area;
the second plurality of fins has a second fin density per the unit of area; and
the first fin density is greater than the second fin density.
17. The IC of claim 14 , wherein:
an upper surface of a first fin of the first plurality of fins overlies the first region of the semiconductor substrate; and
an upper surface of a second fin of the first plurality of fins overlies the first region of the semiconductor substrate.
18. The IC of claim 17 , wherein the first fin of the first plurality of fins is laterally spaced further from the second fin of the first plurality of fins than any other fins of the first plurality of fins.
19. The IC of claim 14 , wherein:
the perimeter of the epitaxial structure is defined by a plurality of sidewalls of the epitaxial structure; and
a sidewall of the plurality of sidewalls is disposed laterally between a fin of the first plurality of fins and a fin of the second plurality of fins.
20. The IC of claim 19 , wherein the fin of the first plurality of fins neighbors the fin of the second plurality of fins.