Granted Patent B2

US 12,205,521 · App. 17/677,825 · Granted Jan 21, 2025

Inventors: Jens Richter (Hemau, DE); Kilian Regau (Regensburg, DE); Patrick Hoerner (Regensburg, DE)

Assignee: OSRAM OPTO SEMICONDUCTORS GMBH

G09G3/32B60K35/00G09G5/10B60K35/22B60K2360/1523B60K2360/349G09G2320/0633

Abstract

Claims (27)

1. A device for electronic control of a μ-LED pixel cell, comprising:

a data signal line, a threshold line configured to receive a pulse width modulation (PWM) signal as a switching signal during operation, and a selection signal line;

a μ-LED electrically connected in series to a dual-gate transistor and together with it between a first and second potential terminal;

wherein the dual-gate transistor is arranged with its current conduction contacts between a terminal of the μ-LED and a potential terminal, and a first control gate of the dual-gate transistor is connected to the threshold line; and

a selection hold circuit comprising a capacitor coupled to a second control gate of the dual-gate transistor and to a current conduction contact of the dual-gate transistor, and a control transistor having its control terminal connected to the selection signal line;

wherein a first charge storage is connected to the second control gate of the dual-gate transistor and to the first potential terminal; and

wherein the device further comprises a temperature compensation circuit with a negative feedback based on detection of a forward voltage by the μ-LED, the temperature compensation circuit being configured on an output side to output a signal on the threshold line.

2. The device according to claim 1 , wherein the dual-gate transistor comprises a backgate transistor in which a backgate forms the first control gate.

3. The device according to claim 1 , wherein the first control gate of the dual-gate transistor is configured to set a threshold voltage.

4. The device according to claim 1 , wherein the dual-gate transistor comprises a thin-film transistor with two opposite control gates.

5. The device according to claim 1 , wherein the selection hold circuit comprises another control transistor.

6. The device according to claim 1 , wherein the temperature compensation circuit comprises a control path arranged in parallel with the dual-gate transistor and having two paths connected in series.

7. The device according to claim 6 , wherein the threshold line is connected from a node between the two paths provided by a third control transistor and a fourth control transistor, to the first control gate of the dual-gate transistor.

8. The device according to claim 7 , wherein the control terminal of the fourth control transistor is connected to the second potential terminal.

9. The device according to claim 7 , wherein the temperature compensation circuit comprises a second charge storage device connected to the control terminal of the control transistor providing one of the two paths and to the first potential terminal.

10. The device according to claim 9 , wherein a second data signal line for programming a negative feedback factor is provided, which is coupled to the second charge storage and the third control transistor.

11. The device according to claim 10 , wherein the coupling is established via a fifth control transistor controlled by a second selection signal line.

12. The device according to claim 1 , wherein the temperature compensation circuit is connected to the second potential terminal via its third control transistor.

13. The device according to claim 1 , wherein the transistors are field-effect transistors using NMOS technology.

14. A device for electronic control of a μ-LED pixel cell, comprising:

a data signal line, a threshold line, and a selection signal line;

a μ-LED electrically connected in series to a dual-gate transistor, the μ-LED and the dual-gate transistor being disposed between a first and second potential terminal, wherein:

the dual-gate transistor is arranged with its current conduction contacts between a terminal of the μ-LED and a potential terminal; and

a first control gate of the dual-gate transistor is connected to the threshold line;

a selection hold circuit comprising a capacitor coupled to a second control gate of the dual-gate transistor and to a current conduction contact of the dual-gate transistor, and a control transistor having its control terminal connected to the selection signal line;

a temperature compensation circuit with a negative feedback based on detection of a forward voltage by the μ-LED, the temperature compensation circuit being configured on an output side to output a signal on the threshold line; and

a first charge storage connected to the second control gate of the dual-gate transistor and to the first potential terminal.

Assignments (1)

Priority Claims (7)

Continuity (4)

References Cited (386)