Memory device, memory system, and operation method of memory device
A memory device includes a driver that drives a data line connected with an external device, an internal ZQ manager that generates an internal ZQ start signal, a selector that selects one of the internal ZQ start signal and a ZQ start command from the external device, based on a ZQ mode, a ZQ calibration engine that generates a ZQ code by performing ZQ calibration in response to a selection result of the selector, and a ZQ code register that loads the ZQ code onto the driver in response to a ZQ calibration command from the external device.
1. An operating method of a memory controller for ZQ calibration, the method comprising:
transmitting a mode register write (MRW) command to a memory device for setting one of a background ZQ calibration mode and a command based ZQ calibration mode in a first mode register of the memory device;
when the background ZQ calibration mode is set in the first mode register:
after a first time period, transmitting a mode register read (MRR) command to the memory device for detecting a ZQ update flag (ZQUF); and
upon detecting the ZQUF, transmitting a first ZQ latch command to the memory device for updating a ZQ code register, and upon failing to detect the ZQUF, repeating the step of transmitting the MRR command,
wherein, the memory device performs a background ZQ calibrating operation to generate a new ZQ code in response to an internal ZQ start signal, and the memory device updates a ZQ code register with the new ZQ code in response to the first ZQ latch command, and
when the command based ZQ calibration mode is set in the first mode register:
transmitting a ZQ start command to the memory device, wherein the memory device performs a command-based ZQ calibrating operation to generate a second ZQ code in response to the ZQ start command; and
transmitting a second ZQ latch command after a second time period required for performing the command-based ZQ calibrating operation,
wherein the ZQ code register is updated with the second ZQ code in response to the second ZQ latch command,
wherein the memory device includes a selector configured to select one of an internal ZQ calibration start signal and the ZQ start command in response to a ZQ mode set in the first mode register.
2. The method of claim 1 , wherein the first time period is equal to or greater than a time period required for performing the background ZQ calibrating operation.
3. The method of claim 2 , wherein the first ZQ latch command is transmitted only when the ZQUF is detected.
4. The method of claim 3 , wherein the ZQUF is not detected when the new ZQ code generated from the background ZQ calibrating operation is not different from the previous ZQ code stored in the ZQ code register.
5. The method of claim 4 , wherein the ZQ code register is updated only when the new ZQ code generated from the background calibrating operation is different from the previous ZQ code stored in the ZQ code register.
6. The method of claim 1 , wherein repeating the step of transmitting the MRR command is performed periodically with the first time period.
7. An operating method of a memory controller for ZQ calibration, the method comprising:
transmitting a mode register write (MRW) command to a memory device for setting one of a background ZQ calibration mode and a command based ZQ calibration mode in a first mode register of the memory device;
when the background ZQ calibration mode is set in the first mode register:
after a first time period, transmitting a first ZQ latch command to the memory device periodically for updating a ZQ code register of the memory device,
wherein, the memory device performs a background ZQ calibrating operation to generate a new ZQ code in response to an internal ZQ start signal, and the memory device updates a ZQ code register with the new ZQ code in response to the first ZQ latch command,
when the command based ZQ calibration mode is set in the first mode register:
transmitting a ZQ start command to the memory device, wherein the memory device performs a command-based ZQ calibrating operation to generate a second ZQ code in response to the ZQ start command; and
transmitting a second ZQ latch command after a second time period required for performing the command-based ZQ calibrating operation,
wherein the ZQ code register is updated with the second ZQ code in response to the second ZQ latch command, and
wherein the memory device includes a selector configured to select one of an internal ZQ calibration start signal and the ZQ start command in response to a ZQ mode set in the first mode register.
8. The method of claim 7 , wherein the first time period is equal to or greater than a time period required for performing the background ZQ calibrating operation.
9. The method of claim 8 , wherein the first ZQ latch command is transmitted regardless of a ZQ update flag (ZQUF) state of the memory device.
10. The method of claim 9 , wherein the ZQ code register is updated in response to the ZQ latch command only when the ZQUF is set.
11. The method of claim 10 , wherein the ZQUF is set only when the new ZQ code generated from the background calibrating operation is different from the previous ZQ code stored in the ZQ code register.
12. The method of claim 7 , wherein transmitting the first ZQ latch command is performed periodically with the first time period.