IP Library › Granted Patent US 12,224,954
Granted Patent B2
US 12,224,954 · App. 17/515,343 · Granted Feb 11, 2025

Network interface device

Inventors: Steven L. Pope (Cambridge, GB); Dmitri Kitariev (Newport Beach, CA); Derek Roberts (Cambridge, GB)
Assignee: XILINX, INC.
H04L49/9068G06F9/5044G06N20/00H04L45/22H04L47/34H04L63/1416H04L63/1458G06F2209/509
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Quick Facts
Patent No.
US 12,224,954
App. No.
17/515,343
Granted
Feb 11, 2025
Kind
B2
Abstract

A network interface device has an interface configured to interface with a network. The interface is configured to at least one of receive data from the network and put data onto the network. The network interface device has an application specific integrated device with a plurality of data processing pipelines to process at least one of data which has been received from the network and data which is to be put onto said network and an FPGA arranged in a path parallel to the data processing pipelines.

Claims (32)

1. A network interface device comprising:

a network interface; and

an integrated circuit comprising:

(i) application specific integrated circuit (ASIC) logic,

(ii) a programmable logic, wherein the ASIC logic and the programmable logic provide a plurality of data processing pipelines, including an ASIC logic implemented data processing pipeline and a programmable logic implemented data processing pipeline, arranged to process data, which has been received from a network connected to the network interface, and process data which is to be put onto said network, and

(iii) a network switch configured to receive at least one dataflow from the network interface and to provide as an output to the plurality of data processing pipelines, the at least one dataflow being spread between the ASIC logic implemented data processing pipeline and the programmable logic implemented data processing pipeline, wherein at least one data processing pipeline is configured to perform one of: (i) switching from processing data received from the network to processing data to be put onto said network; and (ii) switching from processing data to be put onto said network to processing data received from the network.

2. The network interface device as claimed in claim 1 , wherein the network interface device comprises:

a transaction ordering device configured to receive outputs from the data processing pipelines which process data received from the network, and to ensure that the outputs received from the data processing pipelines are provided to a host device in an order that the data was received in, at the network interface.

3. The network interface device as claimed in claim 1 , wherein said programmable logic is configured to perform one or more of:

reduce data in one or more flows;

aggregate data in one or more flows;

perform hybrid processing;

detect a DDOS attack;

machine learning;

perform a software defined networking function;

provide an OpenCL kernel offload;

provide an offload function; and

take remedial action against a denial of service attack.

4. The network interface device as claimed in claim 1 , wherein said programmable logic is arranged to be reconfigurable.

5. The network interface device as claimed in claim 4 , wherein said programmable logic is arranged to be reconfigurable while said network interface is in use.

6. The network interface device as claimed in claim 5 , wherein said network interface device is configured to cause data to be explicitly dropped when said programmable logic is being reconfigured while in use.

7. The network interface device as claimed in claim 5 , wherein said network interface device is configured to cause data to be routed to one or more data processing pipelines provided by the ASIC logic when said programmable logic is being reconfigured while in use.

8. The network interface device as claimed in claim 1 , wherein at least one data processing pipeline is configured to process data received from the network and at least one data processing pipeline is configured to process data to be put onto said network.

9. The network interface device as claimed in claim 1 , wherein at least one data processing pipeline is configured to process data received from the network and to process data to be put onto said network.

10. The network interface device as claimed in claim 2 , wherein the transaction ordering device is configured to ensure that data of a flow received from the data processing pipelines provided by the ASIC logic and a data processing pipeline as provided by the programmable logic and which has been processed in the data processing pipelines provided by the ASIC logic or the data processing pipeline as provided by the programmable logic is provided to the host device in an order that the data of the flow was received in, at the network interface.

11. The network interface device as claimed in claim 10 , wherein network data is processed by at least one of the plurality of data processing pipelines provided by the ASIC logic and the data processing pipeline as provided by said programmable logic.

12. The network interface device as claimed in claim 1 , comprising a peripheral device interface.

13. The network interface device as claimed in claim 12 , wherein said peripheral device interface provides coupling by one or more of Peripheral Component Interconnect express (PCIe), Advanced extensible interface (AXi) and Coherent Accelerator Processor Interface (CAPI).

14. The network interface device as claimed in claim 12 , wherein said peripheral device interface is provided by a second application specific integrated device.

15. The network interface device as claimed in claim 1 , wherein the integrated circuit is an application specific integrated circuit.

16. The network interface device as claimed in claim 1 , further comprising a host computing device interface configured to perform signaling of data or data packets to and from a host.

17. The network interface device as claimed in claim 1 , wherein the ASIC logic further implements a classifying function comprising classifying data into flows, spreading dataflows among different data processing pipelines.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 1, 2021
From: POPE, STEVEN L.; KITARIEV, DMITRI; ROBERTS, DEREK
To: SOLARFLARE COMMUNICATIONS, INC.
Reel/Frame 057980/0637 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 1, 2021
From: SOLARFLARE COMMUNICATIONS, INC.
To: XILINX, INC.
Reel/Frame 057982/0119 →
Continuity (2)
Continuation 15847742 · Dec 19, 2017
Related Publication 20220060434A1 · Feb 24, 2022
References Cited (112)
US 4905234A · Childress et al. · 1990 [cited by applicant]
US 5612950A · Young · 1997 [cited by applicant]
US 5937169A · Connery et al. · 1999 [cited by applicant]
US 6591302B2 · Boucher et al. · 2003 [cited by applicant]
US 6708218B1 · Ellington, Jr. et al. · 2004 [cited by applicant]
US 6965941B2 · Boucher et al. · 2005 [cited by applicant]
US 7688838B1 · Aloni et al. · 2010 [cited by applicant]
US 7818563B1 · Dwork et al. · 2010 [cited by applicant]
US 7835380B1 · Aloni et al. · 2010 [cited by applicant]
US 7869352B1 · Turner et al. · 2011 [cited by applicant]
US 8346919B1 · Eiriksson et al. · 2013 [cited by applicant]
US 8473316B1 · Panzitta et al. · 2013 [cited by applicant]
US 8769231B1 · Ansari et al. · 2014 [cited by applicant]
US 8789135B1 · Pani · 2014 [cited by applicant]
US 9407426B2 · Blumenthal et al. · 2016 [cited by applicant]
US 9456060B2 · Pope et al. · 2016 [cited by applicant]
US 10686731B2 · Pope et al. · 2020 [cited by applicant]
US 10686872B2 · Pope et al. · 2020 [cited by applicant]
US 10886218B2 · Teh et al. · 2021 [cited by applicant]
US 20020174240A1 · Nason et al. · 2002 [cited by applicant]
US 20020184487A1 · Badamo et al. · 2002 [cited by applicant]
US 20030117958A1 · Nation et al. · 2003 [cited by applicant]
US 20030231649A1 · Awoseyi et al. · 2003 [cited by applicant]
US 20040010712A1 · Hui et al. · 2004 [cited by applicant]
US 20040054813A1 · Boucher et al. · 2004 [cited by applicant]
US 20040073716A1 · Boom et al. · 2004 [cited by applicant]
US 20050010819A1 · Williams et al. · 2005 [cited by applicant]
US 20050088969A1 · Carlsen et al. · 2005 [cited by applicant]
US 20050125694A1 · Fakes et al. · 2005 [cited by applicant]
US 20060023705A1 · Zoranovic et al. · 2006 [cited by applicant]
US 20060026679A1 · Zakas · 2006 [cited by applicant]
US 20060174242A1 · Zhu et al. · 2006 [cited by applicant]
US 20070067497A1 · Craft et al. · 2007 [cited by applicant]
US 20070150954A1 · Shon · 2007 [cited by applicant]
US 20070174841A1 · Chamberlain et al. · 2007 [cited by applicant]
US 20070208854A1 · Wiryaman et al. · 2007 [cited by applicant]
US 20070209069A1 · Saklikar et al. · 2007 [cited by applicant]
US 20070214504A1 · Milani Comparetti et al. · 2007 [cited by applicant]
US 20080005776A1 · VerSteeg et al. · 2008 [cited by applicant]
US 20080025515A1 · Coombs · 2008 [cited by applicant]
US 20080140574A1 · Boucher et al. · 2008 [cited by applicant]
US 20080189373A1 · Ikonen et al. · 2008 [cited by applicant]
US 20080218205A1 · Madurawe · 2008 [cited by applicant]
US 20080273532A1 · Bar-David et al. · 2008 [cited by applicant]
US 20090204813A1 · Kwan · 2009 [cited by applicant]
US 20100115621A1 · Staniford et al. · 2010 [cited by applicant]
US 20110004771A1 · Matsushima et al. · 2011 [cited by applicant]
US 20110040897A1 · Pope et al. · 2011 [cited by applicant]
US 20110119673A1 · Bloch et al. · 2011 [cited by applicant]
US 20110175645A1 · Hayasaka · 2011 [cited by applicant]
US 20120017069A1 · Bourd et al. · 2012 [cited by applicant]
US 20130003741A1 · Singh et al. · 2013 [cited by applicant]
US 20130047160A1 · Conover · 2013 [cited by applicant]
US 20130054857A1 · Horman et al. · 2013 [cited by applicant]
US 20130080567A1 · Pope · 2013 [cited by applicant]
US 20130145035A1 · Pope et al. · 2013 [cited by applicant]
US 20130325998A1 · Hormuth et al. · 2013 [cited by applicant]
US 20140279342A1 · Maynard · 2014 [cited by applicant]
US 20140304802A1 · Pope et al. · 2014 [cited by applicant]
US 20140310149A1 · Singh · 2014 [cited by applicant]
US 20140310405A1 · Pope et al. · 2014 [cited by applicant]
US 20140324939A1 · Bloch et al. · 2014 [cited by applicant]
US 20150049763A1 · Michels et al. · 2015 [cited by applicant]
US 20150244574A1 · Pirko · 2015 [cited by applicant]
US 20150261556A1 · Jain et al. · 2015 [cited by applicant]
US 20150372807A1 · Khoyi et al. · 2015 [cited by applicant]
US 20160127494A1 · Liu et al. · 2016 [cited by applicant]
US 20160301613A1 · Boucher et al. · 2016 [cited by applicant]
US 20160344629A1 · Gray · 2016 [cited by applicant]
US 20160352687A1 · Pope et al. · 2016 [cited by applicant]
US 20160352870A1 · Manapragada et al. · 2016 [cited by applicant]
US 20160373561A1 · Pope et al. · 2016 [cited by applicant]
US 20170024338A1 · Lavasani · 2017 [cited by examiner]
US 20170026497A1 · Pope et al. · 2017 [cited by applicant]
US 20170094375A1 · Yamada · 2017 [cited by examiner]
US 20170102950A1 · Chamberlain · 2017 [cited by examiner]
US 20170171111A1 · Khare et al. · 2017 [cited by applicant]
US 20170185549A1 · Pope · 2017 [cited by applicant]
US 20170214775A1 · Pope et al. · 2017 [cited by applicant]
US 20180191631A1 · Biederman et al. · 2018 [cited by applicant]
US 20190190853A1 · Pope et al. · 2019 [cited by applicant]
US 20190190982A1 · Pope et al. · 2019 [cited by applicant]
US 20190199654A1 · Pope et al. · 2019 [cited by applicant]
US 20210111116A1 · Teh et al. · 2021 [cited by applicant]
US 20210318871A1 · Kale et al. · 2021 [cited by applicant]
CN 105516191A · 2016 [cited by applicant]
EP 2463782A2 · 2012 [cited by applicant]
WO 2016003489A1 · 2016 [cited by applicant]
WO WO2016010883A1 · 2016 [cited by examiner]
EP 18214016.0-1221—Extended European Search report dated May 8, 2019, 9 pages. [cited by applicant]
U.S. Appl. No. 15/847,742—Office Acton dated Jul. 16, 2019, 32 pages. [cited by applicant]
EP 18214201.8-1213—Extended European Search Report dated May 17, 2019, 8 pages. [cited by applicant]
Jang et al., “Implementation of a Hybrid TCP/IP Offload Engine Prototype.” In Asia-Pacific Conference on Advances in Computer Systems Architecture, pp. 464-477. Springer, Berlin, Heidelberg, 2005. [cited by applicant]
U.S. Appl. No. 16/226,453—Office Action dated Sep. 6, 2019, 34 pages. [cited by applicant]
U.S. Appl. No. 15/847,778—Office Action dated Sep. 6, 2019, 48 pages. [cited by applicant]
U.S. Appl. No. 15/847,778—Response to Office Action dated Sep. 6, 2019 filed Dec. 3, 2019, 16 pages. [cited by applicant]
U.S. Appl. No. 16/226,453—Response to Office Action dated Sep. 6, 2019 filed Dec. 6, 2019, 12 pages. [cited by applicant]
U.S. Appl. No. 16/226,453—Notice of Allowance dated Feb. 7, 2020, 14 pages. [cited by applicant]
U.S. Appl. No. 15/847,778—Notice of Allowance dated Feb. 7, 2020, 10 pages. [cited by applicant]
U.S. Appl. No. 15/847,742—Response to Office Acton dated Jul. 16, 2019, filed Nov. 18, 2019, 12 pages. [cited by applicant]
U.S. Appl. No. 15/847,742—Office Acton dated Feb. 12, 2020, 28 pages. [cited by applicant]
U.S. Appl. No. 16/121,366—Office Action dated Mar. 18, 2020, 15 pages. [cited by applicant]
U.S. Appl. No. 15/847,742—Response to Office Acton dated Feb. 12, 2020, filed May 12, 2020, 13 pages. [cited by applicant]
U.S. Appl. No. 15/847,742—Office Acton dated Aug. 18, 2020, 18 pages. [cited by applicant]
U.S. Appl. No. 16/121,366—Office Action dated Aug. 19, 2020, 17 pages. [cited by applicant]
U.S. Appl. No. 15/847,742—Office Acton dated Dec. 21, 2020, 15 pages. [cited by applicant]
EP 18214016.0—Office Action dated May 7, 2021, 11 pages. [cited by applicant]
Moller, Leandro, et al., “Improving QoS of Multi-Layer Networks-on-Chip with Partial and Dynamic Reconfiguration of Routers”, 2010 International Conference on Field Programmable Logic and Applications, Aug. 31, 2010, 5 … [cited by applicant]
U.S. Appl. No. 15/847,742—Notice of Allowance dated Jul. 6, 2021, 16 pages. [cited by applicant]
Chen et al., “Using NetFPGA to Offload Linux Netfilter Firewall”, 2nd North American NetFPGA Developers Workshop, Stanford, CA, USA, Aug. 2010, 8 pages. [cited by applicant]
Fiessler et al., “HyPaFilter+: Enhanced Hybrid Packet Filtering using Hardware Assisted Classification and Header Space Analysis”, IEEE/ACM Transactions on Networking, 2017, 26 (6), 3655-3669, 15 pages. [cited by applicant]
EP 18214201.8—Notice of Opposition dated Nov. 9, 2021, 43 pages. [cited by applicant]