Granted Patent B2

US 12,230,534 · App. 18/225,249 · Granted Feb 18, 2025

Inventors: Tai-I Yang (Hsinchu, TW); Wei-Chen Chu (Taichung, TW); Yung-Chih Wang (Taoyuan, TW); Chia-Tien Wu (Taichung, TW); Hsin-Ping Chen (Hsinchu County, TW); Shau-Lin Shue (Hsin-Chu, TW)

Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LIMITED

H01L21/76802H01L21/31144H01L21/76831H01L21/76877H01L21/76885H01L23/5226H01L23/5283

Abstract

Claims (42)

1. A semiconductor device, comprising:

a conductive line;

an etch stop layer contacting a first portion of a top surface of the conductive line;

a conductive via contacting a second portion of the top surface of the conductive line; and

a first dielectric layer overlying the etch stop layer and disposed between a first portion of a sidewall of the etch stop layer and a first portion of a sidewall of the conductive via.

2. The semiconductor device of claim 1 , wherein a second portion of the sidewall of the conductive via is in contact with a second portion of the sidewall of the etch stop layer.

3. The semiconductor device of claim 1 , wherein the first dielectric layer is in contact with a top surface of the etch stop layer.

4. The semiconductor device of claim 1 , wherein the first portion of the sidewall of the conductive via is in contact with a sidewall of the first dielectric layer.

5. The semiconductor device of claim 4 , wherein a second portion of the sidewall of the conductive via is in contact with a second portion of the sidewall of the etch stop layer.

6. The semiconductor device of claim 1 , comprising:

a second dielectric layer, wherein the etch stop layer is between a first sidewall of the second dielectric layer and the conductive via.

7. The semiconductor device of claim 6 , wherein a second sidewall of the second dielectric layer is in contact with the conductive via.

8. The semiconductor device of claim 7 , wherein the conductive via and the etch stop layer are between the first sidewall of the second dielectric layer and the second sidewall of the second dielectric layer.

9. The semiconductor device of claim 6 , wherein the etch stop layer is between the first sidewall of the second dielectric layer and the first dielectric layer.

10. The semiconductor device of claim 6 , wherein the etch stop layer and the first dielectric layer are between the first sidewall of the second dielectric layer and the conductive via.

11. A semiconductor device, comprising:

a conductive via;

a first dielectric material contacting a first sidewall of the conductive via; and

a second dielectric material contacting a second sidewall of the conductive via, wherein:

the first dielectric material comprises a first material composition,

the second dielectric material comprises a second material composition different than the first material composition; and

the second dielectric material overlies the first dielectric material.

12. The semiconductor device of claim 11 , comprising:

an etch stop layer contacting the second sidewall of the conductive via.

13. The semiconductor device of claim 11 , comprising:

an etch stop layer separating the first dielectric material from the second dielectric material.

14. The semiconductor device of claim 13 , wherein the etch stop layer and the second dielectric material are between the first dielectric material and the second sidewall of the conductive via.

15. The semiconductor device of claim 11 , comprising:

a conductive line under the conductive via, wherein the conductive via is in contact with the conductive line.

16. The semiconductor device of claim 15 , comprising:

an etch stop layer between the first dielectric material and the second dielectric material, wherein the etch stop layer is in contact with the conductive line.

17. The semiconductor device of claim 15 , comprising:

an etch stop layer, wherein:

the second dielectric material overlies the conductive line, and

the etch stop layer is between the conductive line and the second dielectric material.

18. A semiconductor device, comprising:

a first dielectric material;

an etch stop layer;

a second dielectric material, wherein the etch stop layer is between the first dielectric material and the second dielectric material in a lateral direction; and

a conductive via, wherein the second dielectric material is between the etch stop layer and the conductive via in the lateral direction.

19. The semiconductor device of claim 18 , wherein the etch stop layer and the second dielectric material are between a first sidewall of the first dielectric material and the conductive via in the lateral direction.

20. The semiconductor device of claim 18 , wherein the conductive via contacts a sidewall of the first dielectric material.

Continuity (3)

References Cited (21)