Memory cells with sidewall and bulk regions in vertical structures
Methods, systems, and devices for techniques for memory cells with sidewall and bulk regions in vertical structures are described. A memory cell may include a first electrode, a second electrode, and a self-selecting storage element between the first electrode and the second electrode. The bulk region may extend between the first electrode and the sidewall region. The bulk region may include a chalcogenide material having a first composition, and the sidewall region may include the chalcogenide material having a second composition that is different than the first composition. Also, the sidewall region may separate the bulk region from the second electrode.
1. A method, comprising:
forming a substrate;
forming a stack of alternating layers on the substrate, the stack of alternating layers comprising conductive materials and dielectric materials;
etching the stack of alternating layers to form a plurality of cavities;
depositing a chalcogenide material into a cavity of the plurality of cavities to form a self-selecting storage element that is in contact with a first conductive material of the conductive materials and two dielectric materials of the dielectric materials and that comprises a bulk region and a sidewall region, the bulk region extending between the first conductive material and the sidewall region and comprising at least a first portion of the chalcogenide material having a first composition, and the sidewall region extending from the bulk region and comprising at least a second portion of the chalcogenide material having a second composition that is different than the first composition; and
depositing a second conductive material that contacts the sidewall region of the chalcogenide material.
2. The method of claim 1 , further comprising:
depositing the first conductive material into the plurality of cavities to form a first electrode before the chalcogenide material is deposited into the plurality of cavities, wherein depositing the second conductive material comprises depositing the second conductive material to form a second electrode after the chalcogenide material is deposited.
3. The method of claim 1 , wherein a conductive path extends between the first conductive material and the second conductive material in a first direction that is parallel to a plane defined by the substrate, or in a second direction that is perpendicular to the plane.
4. The method of claim 1 , wherein the bulk region is separated from the second conductive material by the chalcogenide material, the method further comprising:
applying a voltage across the self-selecting storage element using the first conductive material and the second conductive material, wherein the bulk region extends through a portion of the sidewall region and contacts the second conductive material based at least in part on applying the voltage.
5. The method of claim 1 , wherein forming the self-selecting storage element comprises:
etching first portions of the chalcogenide material;
cleaning second portions of the chalcogenide material that remain after the etching;
temperature-treating the second portions of the chalcogenide material;
doping the second portions of the chalcogenide material; and
sealing the second portions of the chalcogenide material.
6. The method of claim 5 , wherein a width of the sidewall region, a mechanical stability of the sidewall region, a conductivity of the sidewall region, or any combination thereof, is based at least in part on a process used for the etching, a duration of the cleaning, a chemical used for the cleaning, a duration of the temperature-treating, a temperature of the temperature-treating, an element used for the doping, a chemical used for the sealing, or any combination thereof.
7. The method of claim 5 , wherein:
a duration of the cleaning is selected to increase a width of the sidewall region until a width of the bulk region reaches a threshold, increase a mechanical stability of the sidewall region, decrease a conductivity of the sidewall region, or any combination thereof, and
a duration of the temperature-treating is selected to increase the width of the sidewall region until the width of the bulk region reaches the threshold, increase the mechanical stability of the sidewall region, decrease the conductivity of the sidewall region, or any combination thereof.
8. The method of claim 1 , wherein the bulk region extends in a first direction that is parallel to a plane defined by the substrate, and wherein a word line that extends in a second direction that is parallel to the plane is formed based at least in part on etching the stack of alternating layers to form the plurality of cavities, the method further comprising:
depositing a third conductive material to form a digit line after depositing the second conductive material, wherein the digit line extends in a third direction that is perpendicular to the plane.
9. The method of claim 1 , wherein a width of the sidewall region is between 5% and 50% of a width of the self-selecting storage element.
10. The method of claim 1 , wherein a first concentration of one or more components in the first composition of the chalcogenide material exceed one or more thresholds and a second concentration of the one or more components in the second composition of the chalcogenide material are less than or equal to the one or more thresholds.
11. The method of claim 1 , wherein a first concentration of one or more components in the first composition of the chalcogenide material is between two and twenty percent different than a second concentration of the one or more components in the second composition.
12. The method of claim 1 , wherein the first composition of the chalcogenide material is programmable between multiple states based at least in part on a voltage being applied across the self-selecting storage element, and wherein the second composition of the chalcogenide material remains in one state regardless of the voltage being applied across the self-selecting storage element.
13. The method of claim 1 , wherein the second composition of the chalcogenide material has a first mechanical stability that is higher than a second mechanical stability of the first composition of the chalcogenide material.
14. A method, comprising:
forming a substrate;
forming a stack of layers on the substrate, the stack of layers comprising one or more conductive materials and one or more dielectric materials;
forming a plurality of cavities within the stack of layers;
depositing a chalcogenide material within a cavity of the plurality of cavities, wherein the chalcogenide material contacts a first dielectric material layer and a second dielectric material layer; and
depositing, after depositing the chalcogenide material within the cavity, a first conductive material within the cavity to form a first electrode, wherein:
the chalcogenide material comprises a bulk region having a first composition and a sidewall region having a second composition that is different than the first composition; and
a portion of the sidewall region extends between the first dielectric material layer to the second dielectric material layer.
15. The method of claim 14 , wherein the portion of the sidewall region separates the bulk region from the first electrode.
16. The method of claim 14 , further comprising:
depositing, prior to depositing the chalcogenide material within the cavity, a second conductive material into the cavity to form a second electrode.
17. The method of claim 16 , further comprising:
applying a voltage across the chalcogenide material, wherein the bulk region extends through a portion of the sidewall region and contacts the second conductive material based at least in part on applying the voltage.
18. The method of claim 16 , wherein a conductive path extends between the first conductive material and the second conductive material in a first direction that is parallel to a plane defined by the substrate, or in a second direction that is perpendicular to the plane.
19. The method of claim 14 , further comprising:
forming a self-selecting storage element based at least in part on depositing the chalcogenide material, wherein forming the self-selecting storage element comprises:
etching first portions of the chalcogenide material;
cleaning second portions of the chalcogenide material that remain after the etching;
temperature-treating the second portions of the chalcogenide material;
doping the second portions of the chalcogenide material; and
sealing the second portions of the chalcogenide material.
20. A method, comprising:
forming a substrate;
forming a stack of layers on the substrate;
forming a first electrode and a second electrode in a layer of the stack of layers, wherein a cavity is located between the first electrode and the second electrode within the layer;
depositing a chalcogenide material within the cavity, wherein the chalcogenide material contacts the first electrode, the second electrode, and at least one dielectric material; and
depositing, after depositing the chalcogenide material within the cavity, second dielectric material within the cavity, wherein:
the chalcogenide material comprises a bulk region having a first composition and a sidewall region having a second composition that is different than the first composition; and
a portion of the sidewall region extends between the first electrode and the second electrode and is positioned between the bulk region and the second dielectric material.