IP Library Granted Patent US 12,237,397
Granted Patent B2
US 12,237,397 · App. 18/343,555 · Granted Feb 25, 2025

Partial directional etch method and resulting structures

Inventor: Shiang-Bau Wang (Pingzchen, TW)
Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
H01L29/66545H01L27/0886H01L29/66795H01L29/7851
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Quick Facts
Patent No.
US 12,237,397
App. No.
18/343,555
Granted
Feb 25, 2025
Kind
B2
Abstract

In a gate replacement process, a dummy gate and adjacent structure, such as a source/drain region, are formed. The dummy gate is removed, at least in part, using a directional etch to remove some but not all of the dummy gate to form a trench. A portion of the dummy gate remains and protects the adjacent structure. A gate electrode can then be formed in the trench. A two step process can be employed, using an initial isotropic etch followed by the directional etch.

Claims (33)

1. A device comprising:

a fin extending upwards from a substrate;

an isolation material at least partially surrounding the fin;

a metal gate electrode and gate dielectric extending over a top and sidewalls of the fin; and

a polysilicon material extending along respective bottom portions of sidewalls of the metal gate electrode, the polysilicon material being interjacent the gate dielectric and the substrate in a direction perpendicular to the major surface of the substrate.

2. The device of claim 1 , wherein the polysilicon material flares outward from a sidewall of the metal gate electrode when viewed in top down perspective.

3. The device of claim 1 , wherein the metal gate electrode has a cross-section shape having a first portion having substantially vertical sidewalls and a footing portion wherein the sidewalls widen outwards.

4. The device of claim 1 , wherein the polysilicon material also comprises silicon oxide.

5. The device of claim 1 , further comprising a source/drain region at least partially within the fin.

6. The device of claim 5 , wherein the polysilicon material extends from a sidewall of the metal gate electrode to a sidewall of the source/drain region, when viewed from a top-down perspective.

7. The device of claim 1 , wherein the polysilicon material electrically insulates the metal gate electrode from adjacent conductive structures.

8. The device of claim 1 , wherein the polysilicon material is confined to a bottom region of a trench in which the metal gate electrode is formed.

9. A device comprising:

a fin formed on a substrate and having disposed therein a source region and a drain region, respectively;

a dielectric layer at least partially surrounding the fin, including the source region and the drain region;

a metal gate electrode, extending over the fin, between the source region and the drain region; and

a polysilicon remnant extending from a sidewall of the metal gate electrode to a sidewall of the source region when viewed in top-down perspective.

10. The device of claim 9 , wherein the polysilicon remnant also includes silicon oxide.

11. The device of claim 9 , wherein the polysilicon remnant insulates the metal gate electrode from the source region and the drain region.

12. The device of claim 9 , wherein the polysilicon remnant has a triangular shape when viewed in cross-section.

13. The device of claim 9 , wherein the polysilicon remnant has a triangular shape when viewed in top-down view.

14. The device of claim 9 , wherein the polysilicon remnant extends in a direction perpendicular to the major surface of the substrate.

15. The device of claim 9 , wherein the polysilicon remnant extends in a direction parallel to a longitudinal axis of the fin.

16. The device of claim 9 , wherein the metal gate electrode is formed in a trench in the dielectric layer, and wherein polysilicon remnant extends from a first sidewall of the trench to a second sidewall of the trench.

17. The device of claim 16 , wherein the polysilicon remnant is confined to bottom corners of the trench.

18. A method of forming a device, the method comprising:

forming over a fin structure a polysilicon layer, the fin structure having a longitudinal axis in a first direction;

etching the polysilicon layer to form a dummy gate, wherein the dummy gate has an upper portion with a nominal width, measured in the first direction, and the dummy gate further has a lower portion that flares out to a second width, measured in the first direction, wider than the nominal width;

forming an insulating material around the dummy gate;

removing the upper portion of the dummy gate to form a trench in the insulating material while leaving the lower portion of the dummy gate in place; and

forming over the lower portion of the dummy gate a metal gate electrode.

19. The method of claim 18 , further comprising forming spacer layers around the dummy gate prior to the step of removing the upper portion of the dummy gate 30 to form a trench.

20. The method of claim 19 , wherein the metal gate electrode is deposited in the trench in the insulating material.

Continuity (4)
Continuation 17809055 · Jun 27, 2022
Continuation 17026012 · Sep 18, 2020
Provisional Application 62981838 · Feb 26, 2020
Related Publication 20230343853A1 · Oct 26, 2023
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