IP Library › Granted Patent US 12,237,695
Granted Patent B2
US 12,237,695 · App. 18/515,083 · Granted Feb 25, 2025

Rectifier buck with external FET

Inventors: John Walley (Ladera Ranch, CA); Marc Keppler (Windsor, CO); Jim Le (Timnath, CO); Chongming M. Qiao (Irvine, CA); Shiju Wang (Irvine, CA)
Assignee: Avago Technologies International Sales Pte. Limited
H02J50/12H02J7/02H02J50/80H02M1/08H02M3/158
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Quick Facts
Patent No.
US 12,237,695
App. No.
18/515,083
Granted
Feb 25, 2025
Kind
B2
Abstract

A system is disclosed. The system includes a first circuit that includes a first receiver configured to receive a wireless power input, a first conductor, and operably coupled to the first receiver, and a switch network operably coupled to the first conductor configured to rectify the wireless power input and generate a rectified voltage. The first circuit further includes a first field effect transistor operably coupled to the first conductor and configured to receive a portion of the wireless power input from the first conductor and output an output voltage back to the first conductor based upon a gate input. In one or more embodiments, the first circuit further includes a first controller configured to determine if the rectified voltage is greater than a voltage threshold and transmit a transmission of the gate input to the first field effect transistor if the rectified voltage is above the voltage threshold

Claims (33)

1. A system comprising a first apparatus, the first apparatus comprising:

a first receiver configured to receive a wireless power input;

a first conductor coupled to the first receiver;

a switch network coupled to the first conductor, wherein the switch network is configured to rectify the wireless power input and generate a rectified voltage;

a first field effect transistor coupled to the first conductor and configured to regulate the rectified voltage by modulating an impedance associated with the wireless power input; and

a gate driver coupled to the first field effect transistor and a diode coupled to the first field effect transistor and the gate driver, wherein the gate driver transmits a control signal based on a voltage signal transmitted from the diode to the gate driver.

2. The system of claim 1 , further comprising a first controller configured to transmit a control signal to the first field effect transistor in response to the rectified voltage being above a voltage threshold.

3. The system of claim 1 , wherein the first receiver is configured in parallel relative to the first conductor.

4. The system of claim 1 , wherein the first receiver is configured in series relative to the first conductor.

5. The system of claim 1 , further comprising a second field effect transistor coupled to the first conductor.

6. The system of claim 1 , wherein the first field effect transistor comprises a gate configured to receive the control signal.

7. The system of claim 1 , wherein the first apparatus comprises a wireless power transfer receiving circuit.

8. The system of claim 1 , wherein the control signal comprises a pulse width modulation signal, the pulse width modulation signal is synchronized with the wireless power input at the first conductor.

9. The system of claim 1 , further comprising a second apparatus, the second apparatus comprising a wireless power transfer transmitting circuit.

10. The system of claim 9 , wherein a first controller is configured to send a communication to the second apparatus based on the wireless power input or the rectified voltage.

11. A system comprising:

a first receiver configured to receive a wireless power input;

a first conductor coupled to the first receiver;

a switch network coupled to the first conductor, wherein the switch network is configured to rectify the wireless power input and generate a rectified voltage;

a first field effect transistor coupled to the first conductor and configured to regulate the rectified voltage by modulating an impedance associated with the wireless power input; and

a first controller configured to transmit a control signal to the first field effect transistor;

wherein the first controller is configured to determine if the rectified voltage is above a voltage threshold.

12. The system of claim 11 , wherein the control signal is based on a current threshold.

13. The system of claim 11 , wherein the first controller comprises a state machine and a proportional-integral-derivative (PID) controller.

14. The system of claim 11 , wherein the system is configured as a wireless power transfer system.

15. A system comprising:

a first receiver configured to receive a wireless power input;

a first conductor coupled to the first receiver;

a switch network coupled to the first conductor, wherein the switch network is configured to rectify the wireless power input and generate a rectified voltage; and

a first field effect transistor coupled to the first conductor and configured to regulate the rectified voltage in response to the rectified voltage being above a voltage threshold.

16. The system of claim 15 , further comprising a first controller configured to transmit a control signal to the first field effect transistor, the first controller comprising a hysteretic ON/OFF control.

17. The system of claim 16 , wherein the control signal comprises a pulse width modulation signal, the pulse width modulation signal is synchronized with the wireless power input at the first conductor.

18. The system of claim 15 , wherein the first receiver is configured in parallel relative to the first conductor.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 27, 2023
From: WALLEY, JOHN; KEPPLER, MARC; LE, JIM; QIAO, CHONGMING M.; WANG, SHIJU
To: AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE. LIMITED
Reel/Frame 065962/0475 →
Continuity (2)
Continuation 17872316 · Jul 25, 2022
Related Publication 20240088719A1 · Mar 14, 2024
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