IP Library Granted Patent US 12,243,839
Granted Patent B2
US 12,243,839 · App. 18/430,670 · Granted Mar 4, 2025

Bonded semiconductor structure utilizing concave/convex profile design for bonding pads

Inventors: Chung-Sung Chiang (Kaohsiung, TW); Chia-Wei Liu (Tainan, TW); Yu-Ruei Chen (New Taipei, TW); Yu-Hsiang Lin (New Taipei, TW)
Assignee: UNITED MICROELECTRONICS CORP.
H01L24/06H01L23/488H01L23/53228H01L25/0655
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Quick Facts
Patent No.
US 12,243,839
App. No.
18/430,670
Granted
Mar 4, 2025
Kind
B2
Abstract

A bonded semiconductor structure includes a first device wafer and a second device wafer. The first device includes a first dielectric layer, a first bonding pad disposed in the first dielectric layer, and a first bonding layer on the first dielectric layer. The second device wafer includes a second dielectric layer, a second bonding layer on the second dielectric layer, and a second bonding pad disposed in the second dielectric layer and extending through the second bonding layer and at least a portion of the first bonding layer. A conductive bonding interface between the first bonding pad and the second bonding pad and a dielectric bonding interface between the first bonding layer and the second bonding layer include a step-height in a direction perpendicular to the dielectric bonding interface and the conductive bonding interface.

Claims (42)

1. A bonded semiconductor structure, comprising:

a first device wafer, comprising:

a first dielectric layer;

a first bonding pad disposed in the first dielectric layer; and

a first bonding layer on the first dielectric layer; and

a second device wafer, comprising:

a second dielectric layer;

a second bonding layer on the second dielectric layer; and

a second bonding pad disposed in the second dielectric layer and extending through the second bonding layer and at least a portion of the first bonding layer, wherein a conductive bonding interface between the first bonding pad and the second bonding pad and a dielectric bonding interface between the first bonding layer and the second bonding layer comprise a step-height in a direction perpendicular to the dielectric bonding interface and the conductive bonding interface, wherein a height of the step-height is larger than a thickness of the first bonding layer.

2. The bonded semiconductor structure according to claim 1 , wherein the first bonding layer directly contacts a sidewall of the second bonding pad.

3. The bonded semiconductor structure according to claim 1 , further comprising an air gap between a sidewall of the first bonding layer and a sidewall of the second bonding pad.

4. The bonded semiconductor structure according to claim 1 , wherein an angle between a sidewall of the first bonding layer and a top surface of the first bonding pad is larger than 90 degrees.

5. The bonded semiconductor structure according to claim 1 , wherein a thickness of the first bonding layer and a thickness of the second bonding layer are different.

6. The bonded semiconductor structure according to claim 1 , wherein a thickness of the first bonding pad is smaller than a thickness of the second bonding pad.

7. The bonded semiconductor structure according to claim 1 ,

wherein the second bonding pad comprises a step portion adjacent to the dielectric bonding interface.

8. The bonded semiconductor structure according to claim 1 , wherein the first bonding layer and the second bonding layer comprise silicon carbonitride (SiCN), the first bonding pad and the second bonding pad comprise copper (Cu).

9. A bonded semiconductor structure, comprising:

a first device wafer, comprising:

a first dielectric layer;

a first bonding pad disposed in the first dielectric layer; and

a first bonding layer on the first dielectric layer; and

a second device wafer, comprising:

a second dielectric layer;

a second bonding layer on the second dielectric layer and having a dielectric bonding interface with the first bonding layer; and

a second bonding pad disposed in the second dielectric layer, protruding through the second bonding layer and at least a portion of the first bonding layer and having a conductive bonding interface with the first bonding pad, wherein the dielectric bonding interface directly contacts a sidewall of the second bonding pad.

10. The bonded semiconductor structure according to claim 9 ,

wherein a height from the dielectric bonding interface to the conductive bonding interface and a thickness of the first bonding layer are the same.

11. The bonded semiconductor structure according to claim 9 ,

wherein a height from the dielectric bonding interface to the conductive bonding interface is larger than a thickness of the first bonding layer.

12. The bonded semiconductor structure according to claim 9 ,

wherein a height from the dielectric bonding interface to the conductive bonding interface is smaller than a thickness of the first bonding layer.

13. The bonded semiconductor structure according to claim 9 ,

wherein the first bonding layer directly contacts the sidewall of the second bonding pad.

14. The bonded semiconductor structure according to claim 9 ,

wherein an angle between a sidewall of the first bonding layer and a top surface of the first bonding pad is larger than 90 degrees.

15. The bonded semiconductor structure according to claim 9 ,

wherein a thickness of the first bonding layer and a thickness of the second bonding layer are different.

16. The bonded semiconductor structure according to claim 9 ,

wherein a thickness of the first bonding pad is smaller than a thickness of the second bonding pad.

17. The bonded semiconductor structure according to claim 9 ,

wherein a portion of the sidewall of the second bonding pad in direct contact with the dielectric bonding interface has a step profile.

Priority Claims (1)
CN 202110776523.5 · Jul 9, 2021 · national
Continuity (3)
Continuation 18119266 · Mar 8, 2023
Division 17406091 · Aug 19, 2021
Related Publication 20240170423A1 · May 23, 2024
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