Granted Patent B2

US 12,262,465 · App. 17/925,059 · Granted Mar 25, 2025

Inventor: Won Suk Jung (Seoul, KR)

Assignee: LG INNOTEK CO., LTD.

H05K1/0225H05K1/116H05K2201/09509H05K2201/096H05K2201/09827

Abstract

Claims (56)

1. A circuit board comprising:

a first insulating layer;

a second insulating layer disposed on the first insulating layer;

a first via electrode passing through a partial region of the second insulating layer from an upper surface of the second insulating layer toward a lower surface of the second insulating layer; and

a first outer circuit pattern including a first pattern buried in an upper region of the second insulating layer adjacent to the upper surface of the second insulating layer and a second pattern protruded on the second insulating layer; and

wherein the first via electrode has a slope in which a width gradually decreases toward the first insulating layer;

wherein the first pattern overlaps with a slope of a portion having a largest width in the first via electrode while being spaced apart from the first via electrode in a horizontal direction and has a thickness smaller than a thickness of the first via electrode, and

wherein the second pattern does not overlap the first via electrode and the first pattern in the horizontal direction.

2. The circuit board of claim 1 , wherein the second pattern includes:

a first pad overlapping the first via electrode in a vertical direction; and

a first trace overlapping the first pad in a horizontal direction without overlapping the first via electrode in a vertical direction;

wherein a width of the first trace in a horizontal direction is smaller than a width of the first pad in a horizontal direction; and

wherein the first pattern does not vertically overlap the first pad and the first trace of the second pattern.

3. The circuit board of claim 2 , further comprising:

a first protective layer disposed on the second insulating layer;

wherein the first protective layer includes:

a first opening overlapping the first pad in a vertical direction; and

a second opening overlapping the first trace in a vertical direction.

4. The circuit board of claim 3 , wherein a width of the first opening of the first protective layer in a horizontal direction is smaller than a width of the first pad in a horizontal direction, and

wherein at least a portion of an upper surface of the first pad is covered with the first protective layer.

5. The circuit board of claim 3 , wherein a width of the second opening of the first protective layer in a horizontal direction is greater than a width of the first trace in a horizontal direction; and

wherein an upper surface and a side surface of the first trace do not contact the first protective layer.

6. The circuit board of claim 5 , wherein the first trace includes a plurality of trace patterns spaced apart in a horizontal direction, and

wherein the second opening of the first protective layer commonly overlaps with at least two trace patterns in a vertical direction.

7. The circuit board of claim 3 , wherein an upper surface of the first pattern is covered with the first protective layer.

8. The circuit board of claim 2 , wherein a width of the first trace in a horizontal direction is greater than a width of the first pattern in a horizontal direction.

9. The circuit board of claim 8 , wherein the first trace is connected to the first pattern through the first via electrode; and

wherein the first trace includes a ground pattern.

10. The circuit board of claim 1 , further comprising:

a second via electrode passing through a partial region of the first insulating layer from a lower surface of the first insulating layer toward an upper surface of the first insulating layer; and

a second outer layer circuit pattern buried in a lower region of the first insulating layer.

11. The circuit board of claim 10 , wherein the second outer layer circuit pattern includes:

a second pad overlapping the second via electrode in a vertical direction; and

a second trace overlapping the second pad in a horizontal direction without overlapping the second via electrode in a vertical direction; and

wherein a width of the second pad in a horizontal direction is greater than a width of the second trace in a horizontal direction.

12. The circuit board of claim 11 , wherein the second via electrode has a slope in which a width gradually decreases toward the second insulating layer, and

wherein the second pad is in contact with a lower surface of the second via electrode.

13. The circuit board of claim 11 , further comprising:

a second protective layer disposed under the first insulating layer and including at least one third opening.

14. The circuit board of claim 13 , wherein a width of the third opening of the second protective layer in a horizontal direction is greater than a width of the second trace in a horizontal direction.

15. The circuit board of claim 14 , wherein the second traces includes a plurality of second trace patterns spaced apart in a horizontal direction, and

wherein the third opening overlaps with a second trace pattern of at least one of the plurality of second trace patterns in a vertical direction;

wherein a pad layer is disposed under a second trace vertically overlapping with the third opening.

16. The circuit board of claim 15 , wherein the second trace includes first to third trace patterns disposed adjacent to each other in a horizontal direction,

wherein the third opening overlaps the second trace pattern in a vertical direction; and

wherein lower surfaces of the first and third trace patterns are covered with the second protective layer.

17. The circuit board of claim 15 , wherein a width of the pad layer in a horizontal direction is greater than a width of the second trace in a horizontal direction.

18. The circuit board of claim 17 , wherein a width of the pad layer in a horizontal direction is 150% or more of a width of the second trace in a horizontal direction.

19. The circuit board of claim 16 , wherein a width of the third opening in a horizontal direction is greater than a width of the pad layer in a horizontal direction, and

wherein a side surface and a lower surface of the pad layer do not contact the second protective layer.

20. A circuit board comprising:

an outer insulating layer including an upper surface and a lower surface;

a first outer circuit pattern including a first pattern embedded in the upper surface of the outer insulating layer, a second pattern protruded on the upper surface of the outer insulating layer;

a first inner circuit pattern buried in the lower surface of the outer insulating layer; and

a first via electrode disposed between the second pattern of the first outer circuit pattern and the first inner circuit pattern, and

wherein the first pattern overlaps the first via electrode in a horizontal direction.

Assignments (1)

Priority Claims (1)

Continuity (1)

References Cited (20)