IP Library Granted Patent US 12,262,649
Granted Patent B2
US 12,262,649 · App. 17/508,754 · Granted Mar 25, 2025

Phase-change memory

Inventor: Philippe Boivin (Venelles, FR)
Assignee: STMICROELECTRONICS (ROUSSET) SAS
H10N70/231H10N70/021H10N70/063H10N70/882
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Quick Facts
Patent No.
US 12,262,649
App. No.
17/508,754
Granted
Mar 25, 2025
Kind
B2
Abstract

The present description concerns a device including phase-change memory cells, each memory cell including a first resistive element in lateral contact with a second element made of a phase-change material.

Claims (36)

1. A device, comprising:

phase-change memory cells, each phase-change memory cell of the phase-change memory cells including:

a first metallization level on a first side of each phase-change memory cell;

a second metallization level on a second side of each phase-change memory cell opposite the first side along a first direction;

a first element of a conductive material on the first metallization level, the first element having a first portion extending along the first direction and a second portion extending along a second direction transverse to the first direction; and

a second element of a phase-change material extending along the second direction and coupled to the first portion of the first element, the second element being entirely separated from the first metallization level and the second metallization level.

2. The device according to claim 1 , wherein the first element is L-shaped in a cross-section.

3. The device according to claim 1 , wherein the first element has a shape of a spacer.

4. The device according to claim 1 , wherein the first metallization level includes a first conductive track and a first insulating layer, the first conductive track being surrounded by the first insulating layer, wherein the first element has a first surface in contact with the first conductive track.

5. The device according to claim 4 , comprising an insulation region that separates the second element from the first insulating layer and from the first conductive track.

6. The device according to claim 1 , wherein the second element is a planar and horizontal layer.

7. The device according to claim 1 , wherein a first sidewall of the second element is in contact with a sidewall of the first element.

8. The device according to claim 7 , comprising a conductive strip, wherein a second sidewall of the second element, opposite to the first sidewall, is in contact with the conductive strip.

9. The device according to claim 7 , comprising a selection element of an ovonic threshold switching type and a conductive strip, the selection element being covered by the conductive strip, wherein a second sidewall of the second element, opposite to the first sidewall, is in contact with the selection element.

10. The device according to claim 1 , comprising an interconnection network including the first metallization level and the second metallization level, and each phase-change memory cell of the phase-change memory cells is located between the first metallization level and the second metallization level of the interconnection network.

11. The device according to claim 1 , wherein the phase-change material of the second element is a chalcogen-based alloy including germanium, tellurium, and antimony, and the first element is made of a metal or a metal alloy including one or more of titanium nitride or titanium-silicon nitride.

12. The device according to claim 1 , wherein a thickness of the second element along the first direction is in a range from 2 nm to 20 nm, inclusive, a first dimension of the second element along the second direction is smaller than 70 nm, a second dimension of the second element along the second direction is in a range from 20 nm to 60 nm, inclusive, a height of the first element along the first direction is in a range from 30 nm to 80 nm, inclusive, a third dimension of the first element in the second direction is smaller than 70 nm, a fourth dimension of the second portion of the first element in the second direction is in a range from 20 nm to 60 nm, inclusive, and a fifth dimension of the first portion of the first element in the second direction is in a range from 2 nm to 10 nm, inclusive.

13. A structure, comprising:

a first metallization level including a first conductive structure and a first dielectric layer adjacent to the first conductive structure;

a second metallization level including a second conductive structure and a second dielectric layer adjacent to the second conductive structure;

a resistive element between the first metallization level and the second metallization level in a first direction, the resistive element including a first portion and a second portion integrated with the first portion, the first portion extending in the first direction, the second portion extending beyond the first portion in a second direction, the second direction traversing the first direction, the second portion in contact with the first conductive structure, the first portion spaced away from the second metallization level in the first direction; and

a phase-change element of a phase-change material, the phase-change element in contact with the first portion of the resistive element in the second direction and by a first edge surface of the phase-change element, the phase-change element spaced away from both the first metallization level and the second metallization level in the first direction.

14. The structure of claim 13 , comprising a contact structure between the first metallization level and the second metallization level, the contact structure coupled to the second conductive structure and coupled to the phase-change element by a second edge surface of the phase-change element, the second edge surface opposite to the first edge surface.

15. The structure of claim 14 , comprising a switch element of a chalcogen material or of an alloy of the chalcogen material, the switch element positioned between the contact structure and the phase-change element.

16. A device, comprising:

a first metal track level including a first conductive track in a first insulating layer;

a second metal track level including a second conductive track in a second insulating layer;

an L-shaped resistive element between the first and second metal tracks, the L-shaped resistive element including a first portion extending along a first direction on the first conductive track and a second portion extending along a second direction transverse to the first direction;

a phase-change element extending along the first direction and coupled to the second portion of the L-shaped resistive element, the phase-change element being spaced from both the first metal track level and the second metal track level; and

an insulating portion extending along the first direction between the phase-change element and the first metal track level.

17. The device of claim 16 , wherein the insulating portion is on both the first insulating layer and the first conductive track.

18. The device of claim 16 , further comprising a third insulating layer on the first metal track level and surrounding the L-shaped resistive element, the third insulating layer leaving a first surface of the phase-change element exposed.

19. The device of claim 18 , further comprising a conductive strip on the third insulating layer and the first metal track level, the conductive strip being coupled to the first surface of the phase-change element.

20. The device of claim 19 , further comprising:

a fourth insulating layer extending along the first direction between the conductive strip and the second metal track level; and

a conductive via extending entirely through the fourth insulating layer along the second direction and coupled to both the conductive strip and the second metal track level.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 29, 2021
From: BOIVIN, PHILIPPE
To: STMICROELECTRONICS (ROUSSET) SAS
Reel/Frame 057966/0731 →
Priority Claims (1)
FR 2011088 · Oct 29, 2020 · national
Continuity (1)
Related Publication 20220140233A1 · May 5, 2022
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