IP Library › Granted Patent US 12,266,314
Granted Patent B2
US 12,266,314 · App. 18/633,194 · Granted Apr 1, 2025

Display device and electronic apparatus

Inventors: Takuma Fujii (Kanagawa, JP); Naobumi Toyomura (Kanagawa, JP)
Assignee: Sony Semiconductor Solutions Corporation
G09G3/3266H10K50/125H10K59/1213H10K59/1216H10K59/131G09G3/3233G09G2300/0426G09G2320/0233
View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 12,266,314
App. No.
18/633,194
Granted
Apr 1, 2025
Kind
B2
Abstract

[Object] It is possible to further improve reliability. [Solution] There is provided a display device including: a pixel unit which is configured with a plurality of pixel circuits arranged in a matrix, each of the pixel circuits including a light emitting element and a driving circuit for driving the light emitting element; scanning lines which are interconnections connected to the respective pixel circuits and are provided to extend in a first direction and correspond to respective rows of a plurality of the pixel circuits; and signal lines which are interconnections connected to the respective pixel circuits and are provided to extend in a second direction orthogonal to the first direction and correspond to respective columns of a plurality of the pixel circuits. One of the scanning lines and the signal lines, provided for the one pixel circuit, which is larger in number is positioned in a lower-level interconnection layer. An electrode of a capacitance element included in the driving circuit is positioned in the interconnection layer in which either the scanning lines or the signal lines are provided.

Claims (17)

1. A display device comprising:

a substrate;

a plurality of pixel circuits, each of the pixel circuits including a sampling transistor, a driving transistor, a first switching transistor, a capacitive element and a light emitting element;

a plurality of scanning lines including a first scanning line, a second scanning line and a third scanning line, the first scanning line being connected to a control terminal of the sampling transistor, and the second scanning line being connected to a control terminal of the first switching transistor; and

a plurality of signal lines including a first signal line, the first signal line being connected to a first terminal of the sampling transistor, wherein

the sampling transistor is electrically connected between the first signal line and a control terminal of the driving transistor,

a first terminal of the driving transistor is electrically connected to a first terminal of the first switching transistor,

the first terminal of the driving transistor is electrically connected to an anode electrode of the light emitting element,

the first scanning line and the second scanning line are disposed in a first interconnection layer,

the first signal line and a first electrode of the capacitive element are disposed in a second interconnection layer,

the first interconnection layer is disposed between the substrate and the second interconnection layer,

the first scanning line and the second scanning line extend in a first direction, and

the first signal line extends in a second direction perpendicular to the first direction.

2. The display device according to claim 1 , wherein a second electrode of the capacitive element is disposed in a third interconnection layer.

3. The display device according to claim 2 , wherein the second interconnection layer is disposed between the first interconnection layer and the second interconnection layer.

4. The display device according to claim 1 , wherein a part of the first electrode of the capacitive element is overlapped with the first scanning line and the second scanning line in a plan view.

5. The display device according to claim 1 , wherein a part of the first signal line is overlapped with the first scanning line and the second scanning line in a plan view.

Priority Claims (1)
JP 2016-184280 · Sep 21, 2016 · national
Continuity (5)
Continuation 18323062 · May 24, 2023
Continuation 17871204 · Jul 22, 2022
Continuation 17067163 · Oct 9, 2020
Continuation 16323616
Related Publication 20240347009A1 · Oct 17, 2024
References Cited (24)
US 8736522B2 · Taneda et al. · 2014 [cited by applicant]
US 10395595B2 · Matsui · 2019 [cited by examiner]
US 20080029768A1 · Asano et al. · 2008 [cited by applicant]
US 20130249875A1 · Tseng · 2013 [cited by examiner]
US 20140284571A1 · Nomura · 2014 [cited by applicant]
US 20140292622A1 · Lee · 2014 [cited by applicant]
US 20140313448A1 · Kinoe · 2014 [cited by applicant]
US 20150192634A1 · Lewis · 2015 [cited by applicant]
US 20150212376A1 · Hayashi · 2015 [cited by applicant]
US 20150221253A1 · Yamamoto et al. · 2015 [cited by applicant]
US 20150279266A1 · Onoyama · 2015 [cited by examiner]
US 20150379923A1 · Lee · 2015 [cited by applicant]
US 20160322440A1 · Murata · 2016 [cited by applicant]
US 20170025441A1 · Mori · 2017 [cited by applicant]
US 20170250289A1 · Sugawara · 2017 [cited by applicant]
JP 2015055763A · 2015 [cited by applicant]
JP 2015111275A · 2015 [cited by applicant]
JP 2016053636A · 2016 [cited by applicant]
JP 2016053639A · 2016 [cited by applicant]
JP 2016053640A · 2016 [cited by applicant]
JP 2016053641A · 2016 [cited by applicant]
JP 2016114780A · 2016 [cited by applicant]
JP 2016154229A · 2016 [cited by applicant]
KR 1020050104611A · 2005 [cited by applicant]