IP Library › Granted Patent US 12,266,392
Granted Patent B2
US 12,266,392 · App. 18/006,323 · Granted Apr 1, 2025

Driving method of semiconductor device

Inventors: Shunpei Yamazaki (Tokyo, JP); Hajime Kimura (Kanagawa, JP); Hitoshi Kunitake (Kanagawa, JP)
Assignee: Semiconductor Energy Laboratory Co., Ltd.
G11C11/221H10B51/30H10B53/30
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Quick Facts
Patent No.
US 12,266,392
App. No.
18/006,323
Granted
Apr 1, 2025
Kind
B2
Abstract

Provided is a semiconductor device capable of retaining data for a long time. The semiconductor device includes a cell provided with a capacitor, a first transistor, and a second transistor; the capacitor includes a first electrode, a second electrode, and a ferroelectric layer; the ferroelectric layer is provided between the first electrode and the second electrode and polarization reversal occurs by application of a first saturated polarization voltage or a second saturated polarization voltage whose polarity is different from that of the first saturated polarization voltage; and the first electrode, one of a source and a drain of the first transistor, and a gate of the second transistor are electrically connected to one another. In a first period, the first saturated polarization voltage is applied to the ferroelectric layer. In a second period, a voltage having a value between the first saturated polarization voltage and the second saturated polarization voltage is applied to the ferroelectric layer as a data voltage.

Claims (77)

1. A driving method of a semiconductor device, the semiconductor device comprising a cell which comprises a capacitor, a first transistor, a second transistor, and a third transistor,

wherein the capacitor comprises a first electrode, a second electrode, and a ferroelectric layer,

wherein the ferroelectric layer is provided between the first electrode and the second electrode,

wherein polarization reversal occurs in the ferroelectric layer by application of a first saturated polarization voltage or a second saturated polarization voltage whose polarity is different from a polarity of the first saturated polarization voltage,

wherein the first electrode, one of a source and a drain of the first transistor, and a gate of the second transistor are electrically connected to one another,

wherein one of a source and a drain of the second transistor is electrically connected to one of a source and a drain of the third transistor,

wherein the driving method comprises the steps of:

applying the first saturated polarization voltage to the ferroelectric layer in a first period; and

applying a voltage having a value between the first saturated polarization voltage and the second saturated polarization voltage to the ferroelectric layer as a data voltage in a second period,

wherein the first transistor is in an on state in the first period and the second period,

wherein the first transistor is in an off state in a third period,

wherein the third transistor is in an off state in the first to third periods, and

wherein the third transistor is in an on state in a fourth period.

2. The driving method of the semiconductor device, according to claim 1 ,

wherein a potential of the first electrode in the first period is different from a potential of the first electrode in the second period, and

wherein a potential of the second electrode in the first period is different from a potential of the second electrode in the second period.

3. The driving method of the semiconductor device, according to claim 1 ,

wherein the data voltage represents analog data.

4. The driving method of the semiconductor device, according to claim 1 ,

wherein the first transistor comprises a metal oxide in a channel formation region.

5. The driving method of the semiconductor device, according to claim 1 ,

wherein a potential of the second electrode is not changed in the second to fourth periods.

6. The driving method of the semiconductor device, according to claim 1 ,

wherein a constant potential is supplied to the other of the source and the drain of the second transistor in the first to fourth periods.

7. A driving method of a semiconductor device, the semiconductor device comprising a cell which comprises a capacitor, a first transistor, and a second transistor,

wherein the capacitor comprises a first electrode, a second electrode, and a ferroelectric layer,

wherein the ferroelectric layer is provided between the first electrode and the second electrode,

wherein polarization reversal occurs in the ferroelectric layer by application of a first saturated polarization voltage or a second saturated polarization voltage whose polarity is different from a polarity of the first saturated polarization voltage,

wherein the first electrode, one of a source and a drain of the first transistor, and a gate of the second transistor are electrically connected to one another,

wherein the driving method comprises the steps of:

applying the first saturated polarization voltage to the ferroelectric layer in a first period; and

applying a voltage having a value between the first saturated polarization voltage and the second saturated polarization voltage to the ferroelectric layer as a data voltage in a second period, and

wherein a polarity of a polarization amount of the ferroelectric layer in the first period and a polarity of a polarization amount of the ferroelectric layer in the second period are the same.

8. The driving method of the semiconductor device, according to claim 7 ,

wherein the data voltage represents analog data.

9. The driving method of the semiconductor device, according to claim 7 ,

wherein the first transistor comprises a metal oxide in a channel formation region.

10. The driving method of the semiconductor device, according to claim 7 ,

wherein the first transistor is in an on state in the first period and the second period, and

wherein the first transistor is in an off state in a third period.

11. The driving method of the semiconductor device, according to claim 10 ,

wherein the cell comprises a third transistor,

wherein one of a source and a drain of the second transistor is electrically connected to one of a source and a drain of the third transistor,

wherein the third transistor is in an off state in the first to third periods, and

wherein the third transistor is in an on state in a fourth period.

12. The driving method of the semiconductor device, according to claim 11 ,

wherein the potential of the second electrode is not changed in the second to fourth periods.

13. The driving method of the semiconductor device, according to claim 12 ,

wherein a constant potential is supplied to the other of the source and the drain of the second transistor in the first to fourth periods.

14. A driving method of a semiconductor device, the semiconductor device comprising a cell which comprises a capacitor, a first transistor, a second transistor, and a third transistor,

wherein the capacitor comprises a first electrode, a second electrode, a ferroelectric layer, a first paraelectric layer, and a second paraelectric layer,

wherein the ferroelectric layer is provided between the first paraelectric layer and the second paraelectric layer,

wherein the first paraelectric layer is provided between the ferroelectric layer and the first electrode,

wherein the second paraelectric layer is provided between the ferroelectric layer and the second electrode,

wherein polarization reversal occurs in the ferroelectric layer by application of a first saturated polarization voltage or a second saturated polarization voltage whose polarity is different from a polarity of the first saturated polarization voltage,

wherein the first electrode, one of a source and a drain of the first transistor, and a gate of the second transistor are electrically connected to one another,

wherein one of a source and a drain of the second transistor is electrically connected to one of a source and a drain of the third transistor,

wherein the driving method comprises the steps of:

applying the first saturated polarization voltage to the ferroelectric layer in a first period; and

applying a voltage having a value between the first saturated polarization voltage and the second saturated polarization voltage to the ferroelectric layer as a data voltage in a second period,

wherein the first transistor is in an on state in the first period and the second period,

wherein the first transistor is in an off state in a third period,

wherein the third transistor is in an off state in the first to third periods, and

wherein the third transistor is in an on state in a fourth period.

15. The driving method of the semiconductor device, according to claim 14 ,

wherein a potential of the first electrode in the first period is different from a potential of the first electrode in the second period, and

wherein a potential of the second electrode in the first period is different from a potential of the second electrode in the second period.

16. The driving method of the semiconductor device, according to claim 14 ,

wherein the data voltage represents analog data.

17. The driving method of the semiconductor device, according to claim 14 ,

wherein the first transistor comprises a metal oxide in a channel formation region.

18. The driving method of the semiconductor device, according to claim 14 ,

wherein a potential of the second electrode is not changed in the second to fourth periods.

19. The driving method of the semiconductor device, according to claim 14 ,

wherein a constant potential is supplied to the other of the source and the drain of the second transistor in the first to fourth periods.

20. The driving method of the semiconductor device, according to claim 14 ,

wherein a polarity of a polarization amount of the ferroelectric layer in the first period and a polarity of a polarization amount of the ferroelectric layer in the second period are the same.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 20, 2023
From: YAMAZAKI, SHUNPEI; KIMURA, HAJIME; KUNITAKE, HITOSHI
To: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
Reel/Frame 062442/0445 →
Priority Claims (1)
JP 2020-131964 · Aug 3, 2020 · national
Continuity (1)
Related Publication 20230298650A1 · Sep 21, 2023
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