Apparatus and method for ZQ calibration of data transmission driving circuit in memory chip package of multi-memory die structure
View Patent ↗A method for ZQ calibration for a data transmission driving circuit of each memory die in a memory chip package in which memory dies are stacked, includes generating a reference current through a reference resistor connected between a power terminal supplying a power voltage of the data transmission driving circuit and a ground terminal and a first transistor that is diode-connected; supplying first currents corresponding to the reference currents to a pull-up driver of each memory die; performing ZQ calibration of a pull-up driver of a corresponding memory die by comparing a first voltage formed by each first current with a reference voltage formed by the reference current in each of the plurality of memory dies; and performing ZQ calibration of a pull-down driver of the corresponding memory die based on an output impedance of the ZQ calibrated pull-up driver in each of the memory dies.
1. A method for ZQ calibration for a data transmission driving circuit of each memory die in a memory chip package in which a plurality of memory dies are stacked, the method comprising:
generating a reference current or a reference voltage through a reference resistor connected between a power terminal supplying a power voltage of the data transmission driving circuit and a ground terminal and a first transistor that is diode-connected, wherein the reference current or the reference voltage is generated on a first memory die of the plurality of memory dies and shared with the other memory dies of the plurality of memory dies;
supplying a plurality of first currents corresponding to the reference current or the reference voltage to pull-up drivers of the plurality of memory dies, respectively;
performing ZQ calibration of pull-up drivers of the plurality of memory dies, respectively, wherein ZQ calibration of a pull-up driver of the first memory die is performed simultaneously with ZQ calibration of pull-up drivers of the other memory dies; and
performing ZQ calibration of pull-down drivers of the plurality of memory dies respectively, wherein ZQ calibration of a pull-down driver is performed based on an output impedance of a corresponding ZQ calibrated pull-up driver in the same memory die.
2. The method of claim 1 , wherein
the supplying includes generating the plurality of first currents through a plurality of second transistors forming a current mirror with the first transistor.
3. The method of claim 2 , wherein
each of the plurality of second transistors is connected between a pull-up driver of each memory die and the ground terminal,
the ZQ calibration of each pull-up driver is performed by comparing a first voltage formed by each first current with the reference voltage formed by the reference current in each of the plurality of memory dies, and
the first voltage is a voltage at a node between a pull-up driver of each memory die and each second transistor.
4. The method of claim 3 , wherein
the supplying includes:
generating a second current corresponding to the reference current through a second transistor forming a current mirror with the first transistor;
generating a plurality of third currents through a plurality of fourth transistors forming a current mirror with a third transistor connected between the power terminal and the second transistor; and
generating the plurality of first currents through a plurality of sixth transistors forming a current mirror with each of a plurality of fifth transistors respectively connected between the plurality of fourth transistors and the ground terminal.
5. The method of claim 4 , wherein
each of the plurality of sixth transistors is connected between a pull-up driver of each memory die and the ground terminal, and
the first voltage is a voltage at a node between a pull-up driver of each memory die and each sixth transistor.
6. An apparatus for ZQ calibration for a data transmission driving circuit of each memory die in a memory chip package in which a plurality of memory dies are stacked, the apparatus comprising:
a pull-up calibrator that performs ZQ calibration of a pull-up driver by comparing a first voltage formed by a first current supplied to the pull-up driver with a reference voltage formed by a reference current in each of the plurality of memory dies, wherein the first current corresponds to the reference current generated through a reference resistor connected between a power terminal supplying a power voltage of the data transmission driving circuit and a ground terminal and a first transistor that is diode-connected; and
a pull-down calibrator that performs ZQ calibration of a pull-down driver based on an output impedance of the ZQ calibrated pull-up driver in each memory die,
wherein each memory die of the plurality of memory dies includes the pull-up calibrator and the pull-down calibrator, and
wherein ZQ calibration of a pull-up calibrator of a first memory die of the plurality of memory dies is performed simultaneously with ZQ calibration of pull-up calibrators of the other memory dies of the plurality of memory dies.
7. The apparatus of claim 6 , wherein
the pull-up calibrator includes a second transistor configured to form a current mirror with the first transistor and supply the first current to the pull-up driver.
8. The apparatus of claim 6 , further comprising
a reference signal generator that generates the reference voltage by the reference current flowing through the reference resistor and the first transistor that is diode-connected, wherein
the reference signal generator includes:
a second transistor for generating a second current corresponding to the reference current by forming a current mirror with the first transistor;
a third transistor connected between the power terminal and the second transistor; and
a plurality of fourth transistors for generating a plurality of third currents by forming a current mirror with the third transistor.
9. The apparatus of claim 8 , wherein
the pull-up calibrator includes:
a fifth transistor connected between one of the plurality of fourth transistors and a ground terminal; and
a sixth transistor forming a current mirror with the fifth transistor to supply the first current to the pull-up driver.
10. The apparatus of claim 6 , wherein
the pull-up calibrator includes:
a pull-up comparator comparing the first voltage with the reference voltage; and
a pull-up calibration controller for performing the ZQ calibration of the pull-up driver based on a comparison result of the first voltage and the reference voltage.
11. The apparatus of claim 6 , further comprising
a reference signal generator that generates the reference voltage by the reference current flowing through the reference resistor and the first transistor that is diode-connected, wherein
the reference signal generator is formed only in the first memory die of the plurality of memory dies.
12. The apparatus of claim 11 , wherein
the reference voltage, which is generated on the first memory die, is shared with the other memory dies.
13. The apparatus of claim 6 , wherein
ZQ calibration of a pull-down calibrator of the first memory die is performed simultaneously with ZQ calibration of pull-up calibrators of the other memory dies.