IP Library › Granted Patent US 12,284,923
Granted Patent B2
US 12,284,923 · App. 17/580,640 · Granted Apr 22, 2025

Three terminal neuromorphic synaptic device and method for manufacturing the same

Inventor: Jiyong Woo (Daegu, KR)
Assignee: Kyungpook National University Industry-Academic Cooperation Foundation
H10N70/253G06N3/065H10N70/011H10N70/245H10N70/8416H10N70/8616H10N70/8833
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Quick Facts
Patent No.
US 12,284,923
App. No.
17/580,640
Granted
Apr 22, 2025
Kind
B2
Abstract

A three terminal neuromorphic synaptic device and a method for manufacturing the same are provided. The three terminal neuromorphic synaptic device includes a substrate, source/drain electrodes provided on the substrate, a channel region electrically connected between the source electrode and the drain electrode, an ion transfer layer provided on the channel region, a gate electrode provided on the ion transfer layer, and a voltage application unit to apply a gate voltage to the gate electrode. The ion transfer layer includes an electrolyte material to transfer an active ion of the gate electrode between the gate electrode and the channel region, in response to the gate voltage applied to the gate electrode. The voltage application unit adjusts a resistance and a conductance of the channel region by changing an amount of active ions accumulated in the channel region, depending on the number of times that the gate voltage is applied.

Claims (46)

1. A three terminal neuromorphic synaptic device comprising:

a substrate;

a source electrode and a drain electrode provided on the substrate while being spaced apart from each other;

a channel region provided to be electrically connected between the source electrode and the drain electrode, on the substrate;

an ion transfer layer provided on the channel region;

a gate electrode provided on the ion transfer layer;

a voltage application unit to apply a gate voltage to the gate electrode;

a metal liner layer interposed between the ion transfer layer and the gate electrode, the metal liner layer including at least one of titanium nitride (TiN), titanium tungsten (TiW), and titanium (Ti); and

a second heat blocking layer provided on a side surface of the ion transfer layer, a side surface of the gate electrode, and an upper surface of the gate electrode, the second heat blocking layer including a material having a thermal conductivity and an ion conductivity lower than a thermal conductivity and an ion conductivity of the ion transfer layer,

wherein the ion transfer layer includes an electrolyte material to transfer an active ion of the gate electrode between the gate electrode and the channel region, in response to the gate voltage applied to the gate electrode,

wherein the voltage application unit adjusts a resistance and a conductance of the channel region by changing an amount of active ions accumulated in the channel region, depending on the number of times that the gate voltage is applied,

wherein the ion transfer layer includes a first ion transfer layer and a second ion transfer layer,

wherein the gate electrode includes a first copper (Cu) electrode, a second Cu electrode, and a metal electrode including a metal material other than Cu,

wherein the first ion transfer layer is provided on the channel region, the first Cu electrode is provided on the first ion transfer layer, the second ion transfer layer is provided on the first Cu electrode, the second Cu electrode is provided on the second ion transfer layer, and the non-Cu metal electrode is provided on the second Cu electrode.

2. The three terminal neuromorphic synaptic device of claim 1 ,

wherein the channel region may include WO 3 ,

wherein the ion transfer layer includes HfO 2 ,

wherein the gate electrode includes Cu,

wherein the active ion is a Cu ion, and

wherein the ion transfer layer have a thickness of 25 nm to 50 nm.

3. The three terminal neuromorphic synaptic device of claim 1 , wherein the first Cu electrode and the second Cu electrode are formed to have mutually different thickness.

4. The three terminal neuromorphic synaptic device of claim 1 , further comprising:

a first heat blocking layer interposed between the substrate and the channel region,

wherein the first heat blocking layer includes a material having thermal conductivity lower than thermal conductivity of the channel region to increase mobility of the active ion moving from the ion transfer layer to the channel region, and

wherein a current change between the source electrode and the drain electrode is increased by the increased mobility of the active ion.

5. The three terminal neuromorphic synaptic device of claim 4 , wherein the first heat blocking layer is provided by stacking a plurality of layers having thermal conductivity equal to or less than preset critical conductivity, and

wherein the plurality of layers are provided by alternately stacking layers including materials having different thermal conductivity.

6. The three terminal neuromorphic synaptic device of claim 4 , wherein the first heat blocking layer includes at least one material selected from the group consisting of a binary oxide, a ternary oxide, and a chalcogenide-based compound having preset critical thermal conductivity or less.

7. The three terminal neuromorphic synaptic device of claim 1 , wherein a height of the channel region is equal to heights of the source electrode and the drain electrode,

wherein a length of the ion transfer layer is less than a length of the channel region,

wherein a length of the gate electrode is less than the length of the channel region.

8. A method for manufacturing a three terminal neuromorphic synaptic device, the method comprising:

forming a channel region, a source electrode, and a drain electrode on a substrate;

forming an ion transfer layer on the channel region;

forming a metal liner layer on the ion transfer layer, the metal liner layer including at least one of titanium nitride (TiN), titanium tungsten (TiW), and titanium (Ti),

forming a gate electrode to apply a gate voltage onto the metal liner layer;

forming a second heat blocking layer on a side surface of the ion transfer layer, a side surface of the metal liner layer, a side surface of the gate electrode, and an upper surface of the gate electrode, the second heat blocking layer including a material having a thermal conductivity and an ion conductivity lower than a thermal conductivity and an ion conductivity of the ion transfer layer; and

forming a voltage application unit to apply a gate voltage to the gate electrode,

wherein the ion transfer layer includes:

an electrolyte material to transfer an active ion of the gate electrode between the gate electrode and the channel region, in response to the gate voltage applied to the gate electrode,

wherein the voltage application unit is formed to change an amount of active ions accumulated in a region close to the channel region and a resistance of the channel region.

9. The method of claim 8 , further comprising:

forming a first heat blocking layer between the channel region and the substrate.

10. The method of claim 8 , wherein a height of the channel region is equal to heights of the source electrode and the drain electrode,

wherein a length of the ion transfer layer is less than a length of the channel region,

wherein a length of the gate electrode is less than the length of the channel region.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 21, 2022
From: WOO, JIYONG
To: KYUNGPOOK NATIONAL UNIVERSITY INDUSTRY-ACADEMIC COOPERATION FOUNDATION
Reel/Frame 058717/0138 →
Priority Claims (2)
KR 10-2021-0029314 · Mar 5, 2021 · national
KR 10-2021-0117132 · Sep 2, 2021 · national
Continuity (1)
Related Publication 20220285615A1 · Sep 8, 2022
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Cited By (1)
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