Semiconductor device and method for manufacturing the same
View Patent ↗A semiconductor device includes a first and a second nitride-based semiconductor layers, a first and a second electrodes, a first and a second gate electrodes, a first and a second passivation layers and a conductive layer. The first passivation layer has a first portion covered with a first end portion of the first field plate and a second portion free from coverage of the first field plate. The second passivation layer has a first portion covered by the conductive layer and a second portion free from coverage of the conductive layer. A thickness difference between the first and the second portions of the first passivation layer is less than a thickness difference between the first and the second portions of the second passivation layer.
1. A semiconductor device, comprising:
a first nitride-based semiconductor layer disposed above a substrate;
a second nitride-based semiconductor layer disposed on the first nitride-based semiconductor layer and having a bandgap greater than a bandgap of the first nitride-based semiconductor layer;
a first electrode and a second S/D electrode disposed above the second nitride-based semiconductor layer;
a first gate electrode and a second gate electrode disposed above the second nitride-based semiconductor layer and between the first and second electrodes;
a first passivation layer disposed on the second nitride-based semiconductor layer and covering the first and second gate electrodes;
a first field plate disposed over the first gate electrode and over the first passivation layer and having a first end portion directly above the first gate electrode, wherein the first passivation layer has a first portion covered with the first end portion of the first field plate and a second portion free from coverage of the first field plate;
a second passivation layer disposed on the first passivation layer and covering the first field plate; and
a conductive layer disposed over the second passivation layer and extending from the first field plate to the second gate electrode and making contact with a portion of the second nitride-based semiconductor layer, wherein the second passivation layer has a first portion covered by the conductive layer and a second portion free from coverage of the conductive layer, wherein a thickness difference between the first and second portions of the first passivation layer is less than a thickness difference between the first and second portions of the second passivation layer.
2. The semiconductor device of claim 1 , wherein the first field plate has a second end portion in a position lower than the first end portion.
3. The semiconductor device of claim 2 , wherein the first passivation layer further has a third portion covered by the second end portion of the first field plate and a fourth portion free from coverage of the first field plate and abutting against the third region of the first passivation layer.
4. The semiconductor device of claim 3 , wherein a thickness difference between the third and fourth portions of the first passivation layer is less than the thickness difference between the first and second portions of the second passivation layer.
5. The semiconductor device of claim 1 , wherein the conductive layer has a contact portion located between the first and second gate electrodes and penetrating the first and second passivation layers to make contact with the second nitride-based semiconductor layer.
6. The semiconductor device of claim 1 , further comprising:
a second field plate disposed on the second gate electrode and the first passivation layer, wherein the conductive layer has an extending length longer than a distance from the first field plate to the second field plate.
7. The semiconductor device of claim 6 , wherein the conductive layer has a first end surface located between the first S/D electrode and the first field plate and a second end surface located between the second S/D electrode and the second field plate, which are opposite each other.
8. The semiconductor device of claim 1 , wherein the conductive layer and the first and second S/D electrode comprise the same conductive material.
9. The semiconductor device of claim 1 , wherein the second passivation layer further has a third portion covered with the first S/D electrode, and the thickness difference between the first and second portions of the first passivation layer is less than a thickness difference between the second and third portions of the second passivation layer.
10. The semiconductor device of claim 9 , wherein the second portion of the second passivation layer connects the first and third portions of the second passivation layer.
11. The semiconductor device of claim 9 , wherein the second portion of the second passivation layer abuts against the first and third portions of the second passivation layer.
12. The semiconductor device of claim 1 , wherein the first S/D electrode and the conductive layer are spaced apart from each other.
13. The semiconductor device of claim 1 , wherein the first field plate includes titanium nitride (TiN).
14. The semiconductor device of claim 1 , wherein the second passivation layer is conformal with a profile constructed collectively by the first field plate and the first passivation layer.
15. The semiconductor device of claim 14 , wherein the conductive layer is conformal with a profile constructed by the second passivation layer.