Driver circuit and method of operating the same
View Patent ↗An IC includes power and reference nodes, a protection circuit, and a gate driver. The protection circuit includes a series of diode-configured enhancement-mode n-type HEMTs coupled between the power and reference nodes and including a voltage tap, a first enhancement-mode n-type HEMT including a gate coupled to the voltage tap and a source terminal coupled to the reference node, and a second enhancement-mode n-type HEMT including a gate coupled to a drain terminal of the first n-type HEMT and a source terminal coupled to the reference node. The gate driver includes a third enhancement-mode n-type HEMT including a gate coupled to a drain terminal of the second n-type HEMT, a fourth enhancement-mode n-type HEMT including a gate coupled to a source terminal of the third n-type HEMT and a source terminal coupled to the reference node, and an output terminal coupled to a drain terminal of the fourth n-type HEMT.
1. An integrated circuit (IC) comprising:
a power supply node;
a power supply reference node;
a protection circuit comprising:
a series of diode-configured enhancement-mode n-type high electron mobility transistors (HEMTs) coupled between the power supply node and the power supply reference node and comprising a voltage tap;
a first enhancement-mode n-type HEMT comprising a gate coupled to the voltage tap and a source terminal coupled to the power supply reference node; and
a second enhancement-mode n-type HEMT comprising a gate coupled to a drain terminal of the first enhancement-mode n-type HEMT and a source terminal coupled to the power supply reference node; and
a gate driver comprising:
a third enhancement-mode n-type HEMT comprising a gate coupled to a drain terminal of the second enhancement-mode n-type HEMT;
a fourth enhancement-mode n-type HEMT comprising a gate coupled to a source terminal of the third enhancement-mode n-type HEMT and a source terminal coupled to the power supply reference node; and
an output terminal coupled to a drain terminal of the fourth enhancement-mode n-type HEMT.
2. The IC of claim 1 , wherein
each enhancement-mode n-type HEMT of the series of diode-configured enhancement-mode n-type HEMTs and the first through fourth enhancement-mode n-type HEMTs comprises gallium nitride (GaN).
3. The IC of claim 1 , wherein
the series of diode-configured enhancement-mode n-type HEMTs comprises:
a first subset of diode-configured enhancement-mode n-type HEMTs coupled between the power supply node and the voltage tap; and
a second subset of diode-configured enhancement-mode n-type HEMTs coupled between the voltage tap and the power supply reference node,
the first subset comprises a first total number of diode-configured enhancement-mode n-type HEMTs ranging from 1 to 10, and
the second subset comprises a second total number of diode-configured enhancement-mode n-type HEMTs ranging from 1 to 10.
4. The IC of claim 1 , wherein the protection circuit further comprises:
a node, wherein the series of diode-configured enhancement-mode n-type HEMTs and the voltage tap are coupled between the power supply node and the node;
a resistive device coupled between the node and the power supply reference node; and
a fifth enhancement-mode n-type HEMT coupled between the node and the power supply reference node, wherein a gate of the fifth enhancement-mode n-type HEMT is coupled to the drain terminal of the first enhancement-mode n-type HEMT.
5. The IC of claim 1 , wherein the protection circuit further comprises:
a first diode-configured depletion-mode n-type HEMT coupled between the power supply node and the first enhancement-mode n-type HEMT; and
a second diode-configured depletion-mode n-type HEMT coupled between the power supply node and the second enhancement-mode n-type HEMT.
6. The IC of claim 1 , wherein
the power supply node is a first power supply node,
the IC further comprises a fifth enhancement-mode n-type HEMT coupled in series with a sub-circuit between a second power supply node and the power supply reference node,
a gate of the fifth enhancement-mode n-type HEMT is coupled to the output terminal of the gate driver, and
the second power supply node is configured to carry a power supply voltage comprising a voltage level ranging from 50 volts (V) to 150 V or from 600 V to 700 V.
7. The IC of claim 6 , wherein
the fifth enhancement-mode n-type HEMT is positioned adjacent to the gate driver.
8. The IC of claim 1 , wherein
the power supply node is configured to carry a power supply voltage comprising a voltage level ranging from 10 volts (V) to 15 V.
9. An integrated circuit (IC) comprising:
a power supply node;
a power supply reference node;
a protection circuit comprising:
a series of diode-configured enhancement-mode n-type high electron mobility transistors (HEMTs) coupled between the power supply node and the power supply reference node and comprising a voltage tap;
a first enhancement-mode n-type HEMT comprising a gate coupled to the voltage tap and a source terminal coupled to the power supply reference node; and
a second enhancement-mode n-type HEMT comprising a gate coupled to a drain terminal of the first enhancement-mode n-type HEMT and a source terminal coupled to the power supply reference node; and
a gate driver comprising:
a third enhancement-mode n-type HEMT comprising a gate coupled to a drain terminal of the second enhancement-mode n-type HEMT;
a fourth enhancement-mode n-type HEMT coupled between the third enhancement-mode n-type HEMT and the power supply reference node;
a fifth enhancement-mode n-type HEMT comprising a gate coupled to a source terminal of the third enhancement-mode n-type HEMT and a source terminal coupled to the power supply reference node; and
an output terminal coupled to a drain terminal of the fifth enhancement-mode n-type HEMT.
10. The IC of claim 9 , wherein
the protection circuit further comprises:
a first diode-configured depletion-mode n-type HEMT coupled between the power supply node and the first enhancement-mode n-type HEMT; and
a second diode-configured depletion-mode n-type HEMT coupled between the power supply node and the second enhancement-mode n-type HEMT, and the gate driver further comprises:
a third diode-configured depletion-mode n-type HEMT coupled between the power supply node and the third enhancement-mode n-type HEMT.
11. The IC of claim 9 , wherein the gate driver further comprises:
a sixth enhancement-mode n-type HEMT comprising a gate coupled to the source terminal of the third enhancement-mode n-type HEMT and a source terminal coupled to the power supply reference node; and
a seventh enhancement-mode n-type HEMT comprising a drain terminal coupled to the power supply node, a gate coupled to a drain terminal of the sixth enhancement-mode n-type HEMT, and a source terminal coupled to the drain terminal of the fifth enhancement-mode n-type HEMT.
12. The IC of claim 11 , wherein the gate driver further comprises:
a diode-configured enhancement-mode n-type HEMT coupled between the power supply node and a node; and
a diode-configured depletion-mode n-type HEMT coupled between the node and the sixth enhancement-mode n-type HEMT.
13. The IC of claim 12 , wherein the gate driver further comprises:
a capacitive device coupled between the node and the output terminal of the gate driver.
14. The IC of claim 9 , wherein
the power supply node is a first power supply node,
the IC further comprises a sixth enhancement-mode n-type HEMT coupled in series with a sub-circuit between a second power supply node and the power supply reference node,
a gate of the sixth enhancement-mode n-type HEMT is coupled to the output terminal of the gate driver, and
the sixth enhancement-mode n-type HEMT and the sub-circuit are positioned adjacent to the gate driver.
15. The IC of claim 14 , wherein
the first power supply node is configured to carry a first power supply voltage comprising a first voltage level ranging from 10 volts (V) to 15 V, and
the second power supply node is configured to carry a second power supply voltage comprising a second voltage level ranging from 50 volts (V) to 150 V or from 600 V to 700 V.
16. The IC of claim 9 , wherein
a gate of the fourth enhancement-mode n-type HEMT is coupled to an output terminal of a pulse width modulation (PWM) signal source.
17. A method of operating a driver circuit, the method comprising:
using a series of diode-configured enhancement-mode n-type high electron mobility transistors (HEMTs) to divide a first power supply voltage at a voltage tap;
receiving the divided first power supply voltage from the voltage tap at a gate of a first enhancement-mode n-type HEMT comprising a source terminal coupled to a power supply reference node;
receiving a first voltage from a drain terminal of the first enhancement-mode n-type HEMT at a gate of a second enhancement-mode n-type HEMT comprising a source terminal coupled to the power supply reference node;
receiving a second voltage from a drain terminal of the second enhancement-mode n-type HEMT at a gate of a third enhancement-mode n-type HEMT;
receiving a third voltage from a source terminal of the third enhancement-mode n-type HEMT at a gate of a fourth enhancement-mode n-type HEMT comprising a source terminal coupled to the power supply reference node; and
generating an output voltage from a drain terminal of the fourth enhancement-mode n-type HEMT at an output terminal.
18. The method of claim 17 , further comprising:
receiving an input signal at a gate of a fifth enhancement-mode n-type HEMT coupled between the third enhancement-mode n-type HEMT and the power supply reference node.
19. The method of claim 17 , wherein
the using the series of diode-configured enhancement-mode n-type HEMTs to divide the first power supply voltage comprises dividing the first power supply voltage comprising a first voltage level ranging from 10 volts (V) to 15 V, and
the generating the output voltage comprises generating the output voltage comprising a second voltage level greater than the first voltage level.
20. The method of claim 17 , further comprising:
receiving the output signal at a gate of a fifth enhancement-mode n-type HEMT coupled between a power supply node and the power supply reference node,
wherein the power supply node is configured to carry a second power supply voltage comprising a voltage level ranging from 50 volts (V) to 150 V or from 600 V to 700 V.