IP Library › Granted Patent US 12,302,605
Granted Patent B2
US 12,302,605 · App. 18/637,959 · Granted May 13, 2025

Hafnium nitride adhesion layer

Inventors: Kenneth C. Cadien (Edmonton, CA); Michael Clark (Edmonton, CA); Katherine Cook (Edmonton, CA); Korel Dawkins (Edmonton, CA)
Assignee: ZINITE CORPORATION
H10D30/673H01L21/28194H10D30/031H10D30/6713H10D30/6729
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Quick Facts
Patent No.
US 12,302,605
App. No.
18/637,959
Granted
May 13, 2025
Kind
B2
Abstract

A novel adhesion layer of hafnium nitride useful in the fabrication of semiconductor devices is disclosed. In particular, semiconductor devices such as, for example, thin film transistors which include one or more elements formed of metals with high electron concentrations, such as molybdenum, tungsten, nickel, ruthenium, cobalt and alloys thereof, can employ the present invention to better adhere the metal elements to the dielectric material on which the semiconductor devices are formed and the adhesion layer can also serve as a diffusion barrier.

Claims (24)

1. A method of manufacturing a thin film transistor, the method comprising:

forming a hafnium nitride adhesion layer on at least a first region of a substrate, the hafnium nitride adhesion layer being formed via atomic layer deposition;

forming at least one of a source element and a drain element on the hafnium nitride adhesion layer in the at least first region of the substrate, the at least one of the source element and the drain element being formed of a metal with high electron concentration;

forming a metal oxide semiconductor layer on the substrate between the source element and the drain element;

forming a gate dielectric over the metal oxide semiconductor layer; and

forming a gate over the gate dielectric;

wherein the hafnium nitride adhesion layer adheres the at least one of the source element and the drain element of the metal with high electron concentration to the substrate, and wherein the hafnium nitride adhesion layer inhibits migration of oxygen from the substrate to the at least one of the source element and the drain element of the metal with high electron concentration.

2. The method of claim 1 wherein the hafnium nitride adhesion layer is formed by plasma enhanced atomic layer deposition.

3. The method of claim 1 wherein the gate dielectric is hafnium dioxide and is formed by atomic layer deposition.

4. The method of claim 3 wherein the hafnium nitride adhesion layer and the gate dielectric are formed from the same hafnium precursor.

5. The method of claim 3 wherein the gate dielectric is formed by plasma enhanced atomic layer deposition.

6. The method of claim 1 wherein the metal with high electron concentration is selected from the group comprising molybdenum, tungsten, nickel, ruthenium, cobalt and alloys thereof.

7. A method of manufacturing a thin film transistor on a dielectric, comprising:

forming a hafnium nitride adhesion layer over at least a first region of the dielectric, the hafnium nitride adhesion layer being formed via atomic layer deposition;

forming at least one of a source element and a drain element over the hafnium nitride adhesion layer in the at least first region, the at least one of the source element and the drain element being formed of a metal with high electron concentration;

forming a metal oxide semiconductor layer between the source element and the drain element;

forming a gate dielectric over the metal oxide semiconductor layer; and

forming a gate over the gate dielectric;

wherein the hafnium nitride adhesion layer adheres the metal with high electron concentration to the dielectric, and wherein the hafnium nitride adhesion layer inhibits migration of oxygen from the dielectric to the metal with high electron concentration;

wherein the gate dielectric is hafnium dioxide and is formed by atomic layer deposition; and

wherein the hafnium nitride adhesion layer and the gate dielectric are formed from the same hafnium precursor.

8. The method of claim 7 wherein the hafnium nitride adhesion layer is formed by plasma enhanced atomic layer deposition.

9. The method of claim 7 wherein the gate dielectric is formed by plasma enhanced atomic layer deposition.

10. The method of claim 7 wherein the metal with high electron concentration is selected from the group comprising molybdenum, tungsten, nickel, ruthenium, cobalt and alloys thereof.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 25, 2024
From: CADIEN, KENNETH C.; CLARK, MICHAEL; COOK, KATHERINE; DAWKINS, KOREL
To: ZINITE CORPORATION
Reel/Frame 067220/0299 →
Continuity (2)
Provisional Application 63460090 · Apr 18, 2023
Related Publication 20240355895A1 · Oct 24, 2024
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