IP Library › Granted Patent US 12,315,783
Granted Patent B2
US 12,315,783 · App. 17/484,766 · Granted May 27, 2025

Integrated circuit with a ring-shaped hot spot area and multidirectional cooling

Inventors: Madhusudan Krishnan Iyengar (Foster City, CA); Norman Paul Jouppi (Palo Alto, CA); Jorge Padilla (Union City, CA); Christopher Gregory Malone (Mountain View, CA)
Assignee: Google LLC
H01L23/473H01L23/367H01L23/3675H10D89/105
View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 12,315,783
App. No.
17/484,766
Granted
May 27, 2025
Kind
B2
Abstract

Methods, systems, and apparatus, including an integrated circuit (IC) with a ring-shaped hot spot area. In one aspect, an IC includes a first area along an outside perimeter of a surface of the IC. The first area defines a first inner perimeter. The IC includes a second area that includes a center of the IC and that includes a first set of components. The second area defines a first outer. The IC includes a ring-shaped hot spot area between the first area and the second area. The ring-shaped hot spot area defines a ring outer perimeter that is juxtaposed with the first inner perimeter. The ring-shaped hot spot area defines a ring inner perimeter that is juxtaposed with the first outer perimeter. The ring-shaped hot spot area includes a second set of components that produce more heat than the first set of components.

Claims (33)

1. An integrated circuit, comprising:

a first area along an outside perimeter of the integrated circuit, the first area defining a first inner perimeter and comprising a first set of electronic components;

a second area disposed within the first area of the integrated circuit and that includes a second set of electronic components, the second area defining a first outer perimeter that is less than the first inner perimeter and spaced apart from the first inner perimeter; and

a hot spot area disposed between at least a portion of the first area and the second area, wherein the hot spot area includes a third set of electronic components that (i) produce more heat than the first set of electronic components during operation of the integrated circuit and (ii) produce more heat than the second set of electronic components during operation of the integrated circuit, and wherein the third set of electronic components are arranged in the hot spot area based on a power density of each electronic component in the third set of electronic components, wherein the hot spot area:

defines a second outer perimeter that is juxtaposed with the first inner perimeter of the first area; and

defines a second inner perimeter that is juxtaposed with the first outer perimeter of the second area and substantially surrounds the second area.

2. The integrated circuit of claim 1 , wherein the hot spot area comprises a ring shape.

3. The integrated circuit of claim 1 , wherein the third set of electronic components include computational components of a microprocessor core of the integrated circuit.

4. The integrated circuit of claim 1 , wherein the hot spot area comprises four rectangular-shaped segments of electronic components that form a continuous rectangular-shaped ring.

5. The integrated circuit of claim 1 , wherein the hot spot area comprises four rectangular-shaped segments of electronic components that form a segmented rectangular ring-shaped hot spot area.

6. The integrated circuit of claim 1 , wherein:

the hot spot area comprises a set of rectangular-shaped segments that are distributed about the hot spot area and that are spaced apart from each other rectangular-shaped segment; and

spaces between the rectangular-shaped segments comprise electronic components that produce less heat than electronic components in the rectangular-shaped segments.

7. The integrated circuit of claim 1 , further comprising an additional hot spot area disposed between the hot spot area and the second area, the additional hot spot area substantially surrounding the second area and including a fourth set of electronic components that produce more heat than the second set of electronic components.

8. The integrated circuit of claim 7 , wherein the additional hot spot area comprises four rectangular-shaped segments of electronic components that form one of (i) a continuous hollow box-shaped area around the second area or (ii) a segmented rectangular ring-shaped hot spot area.

9. The integrated circuit of claim 1 , further comprising a fin array cold plate comprising a base disposed over the hot spot area and that passes a cooling liquid in multiple directions over the base disposed over the hot spot area such that the cooling liquid passes over the hot spot area.

10. The integrated circuit of claim 9 , further comprising a fin array cold plate comprising a base disposed over the hot spot area and that passes a cooling liquid in multiple directions over the base disposed over the hot spot area such that the cooling liquid passes over the hot spot area.

11. The integrated circuit of claim 1 , wherein the third set of electronic components are arranged in the hot spot area based on the power density of each electronic component in the third set of electronic components being greater than a power density of each electronic component of the first set of electronic components and each electronic component of the second set of electronic components.

12. An integrated circuit, comprising:

a first area along an outside perimeter of the integrated circuit, the first area defining a first inner perimeter and comprising a first set of electronic components;

a second area disposed within the first area of the integrated circuit and that includes a second set of electronic components, the second area defining a first outer perimeter that is less than the first inner perimeter and spaced apart from the first inner perimeter; and

a hot spot area disposed between at least a portion of the first area and the second area, wherein the hot spot area includes a third set of electronic components that (i) have a higher power density than the first set of electronic components and (ii) have a higher power density than the second set of electronic components, wherein the first area surrounds the hot spot area and the second area, and wherein the third set of electronic components are arranged in the hot spot area based on a power density of each electronic component in the third set of electronic components, wherein the hot spot area:

defines a second outer perimeter that is juxtaposed with the first inner perimeter of the first area; and

defines a second inner perimeter that is juxtaposed with the first outer perimeter of the second area and substantially surrounds the second area.

13. The integrated circuit of claim 12 , wherein the hot spot area comprises a ring shape.

14. The integrated circuit of claim 12 , wherein the third set of electronic components include computational components of a microprocessor core of the integrated circuit.

15. The integrated circuit of claim 12 , wherein the hot spot area comprises four rectangular-shaped segments of electronic components that form a continuous rectangular-shaped ring.

16. The integrated circuit of claim 12 , wherein the hot spot area comprises four rectangular-shaped segments of electronic components that form a segmented rectangular ring-shaped hot spot area.

17. The integrated circuit of claim 12 , wherein:

the hot spot area comprises a set of rectangular-shaped segments that are distributed about the hot spot area and that are spaced apart from each other rectangular-shaped segment; and

spaces between the rectangular-shaped segments comprise electronic components that produce less heat than electronic components in the rectangular-shaped segments.

18. The integrated circuit of claim 12 , further comprising an additional hot spot area disposed between the hot spot area and the second area, the additional hot spot area substantially surrounding the second area and including a fourth set of electronic components that have a higher power density than the second set of electronic components.

19. The integrated circuit of claim 18 , wherein the additional hot spot area comprises four rectangular-shaped segments of electronic components that form one of (i) a continuous hollow box-shaped area around the second area or (ii) a segmented rectangular ring-shaped hot spot area.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 10, 2022
From: IYENGAR, MADHUSUDAN KRISHNAN; JOUPPI, NORMAN PAUL; PADILLA, JORGE; MALONE, CHRISTOPHER GREGORY
To: GOOGLE LLC
Reel/Frame 058606/0758 →
Continuity (3)
Continuation 16441998 · Jun 14, 2019
Provisional Application 62852838 · May 24, 2019
Related Publication 20220013435A1 · Jan 13, 2022
References Cited (45)
US 4715438A · Gabuzda et al. · 1987 [cited by applicant]
US 4746966A · Fitzgerald · 1988 [cited by applicant]
US 5014904A · Morton · 1991 [cited by applicant]
US 5050037A · Yamamoto et al. · 1991 [cited by applicant]
US 5239200A · Messina et al. · 1993 [cited by applicant]
US 5497014A · Momose · 1996 [cited by applicant]
US 6687126B2 · Patel et al. · 2004 [cited by applicant]
US 7301770B2 · Campbell · 2007 [cited by applicant]
US 7316263B2 · Lofland · 2008 [cited by applicant]
US 7331380B2 · Ghosh · 2008 [cited by applicant]
US 8004832B2 · Brunschwiler et al. · 2011 [cited by applicant]
US 8162035B2 · Behrens et al. · 2012 [cited by applicant]
US 8833438B2 · Wyatt et al. · 2014 [cited by applicant]
US 9263366B2 · Lin · 2016 [cited by applicant]
US 11158566B2 · Iyengar · 2021 [cited by examiner]
US 20050051893A1 · Kuo · 2005 [cited by examiner]
US 20050286227A1 · Erturk et al. · 2005 [cited by applicant]
US 20060002087A1 · Bezama et al. · 2006 [cited by applicant]
US 20060231947A1 · Hosomi · 2006 [cited by examiner]
US 20070002536A1 · Hall et al. · 2007 [cited by applicant]
US 20070256810A1 · Di Stefano · 2007 [cited by examiner]
US 20080261528A1 · Rosenblatt · 2008 [cited by applicant]
US 20090057881A1 · Arana · 2009 [cited by examiner]
US 20090213541A1 · Butterbaugh et al. · 2009 [cited by applicant]
US 20090316360A1 · Campbell et al. · 2009 [cited by applicant]
US 20100019374A1 · Hundt · 2010 [cited by examiner]
US 20100200197A1 · Bezanna · 2010 [cited by applicant]
US 20130249018A1 · Zojer · 2013 [cited by examiner]
US 20130331996A1 · Brunschwiler et al. · 2013 [cited by applicant]
US 20160079140A1 · Arvelo et al. · 2016 [cited by applicant]
US 20170092565A1 · Chen · 2017 [cited by applicant]
US 20170147727A1 · Bickford et al. · 2017 [cited by applicant]
US 20170310317A1 · Bernardon et al. · 2017 [cited by applicant]
US 20200105643A1 · Wan · 2020 [cited by examiner]
CN 104813758 · 2015 [cited by applicant]
EP 0219668 · 1987 [cited by applicant]
EP 3373331 · 2018 [cited by applicant]
JP 201505650 · 2015 [cited by applicant]
JP 2015056550 · 2015 [cited by applicant]
TW 201709444 · 2017 [cited by applicant]
TW 201909346 · 2019 [cited by applicant]
TW 201913920 · 2019 [cited by applicant]
PCT International Search Report and Written Opinion in International Application No. PCT/US2019/063527, dated Feb. 24, 2020, 15 pages. [cited by applicant]
TW Office Action in Taiwan Application No. 108143504, dated Jul. 21, 2020, 6 pages (with English translation). [cited by applicant]
PCT International Preliminary Report on Patentability in International Application No. PCT/US2019/063527, dated Dec. 2, 2021, 9 pages. [cited by applicant]