Image sensors for advanced driver assistance systems utilizing regulator voltage verification circuitry to detect malfunctions
An electronic device includes a pixel array having a plurality of rows with active imaging pixels, and at least one row with test pixels. Each of the test pixels includes a test voltage generation circuit generating a test voltage, a switching circuit receiving the test voltage and an image pixel output signal and passing the test voltage as output when in a test mode, a comparison circuit receiving the output from the switching circuit and an analog to digital conversion signal and asserting a counter reset signal when the output from the switching circuit and the analog to digital conversion signal are equal in voltage, and a counter beginning counting at a beginning of each test cycle within the test mode, stopping counting upon assertion of the counter reset signal, and outputting its count upon stopping counting. The count is proportional to the test voltage when in the test mode.
1. A method for use with an array of image pixels including a plurality of rows with active imaging pixels and at least one row with regulator voltage verification circuits, wherein the plurality of rows with active imaging pixels and the at least one row with regulator voltage verification circuits operate based upon a regulated voltage, the method comprising testing the regulated voltage by:
activating the at least one row with regulator voltage verification circuits to operate in test mode;
generating a test black voltage and a test white voltage as a function of the regulated voltage;
alternatively passing the test black voltage and the test white voltage to a switching circuit as a test voltage;
passing the test voltage from the switching circuit to a comparison circuit that asserts a counter reset signal when the test voltage and an analog to digital conversion signal are equal in voltage; and
resetting and starting a counter at a beginning of each test cycle within the test mode, stopping the counter upon assertion of the counter reset signal, and outputting a count of the counter, the count being proportional to the test voltage when in the test mode.
2. The method of claim 1 , further comprising generating the analog to digital conversion signal by generating a voltage ramping signal that ramps in a repeating pattern between, in order, a base voltage, a first voltage, the base voltage, and a second voltage; wherein the first voltage is not equal to the second voltage, and wherein the first and second voltages are not equal to the base voltage.
3. The method of claim 2 , further comprising ramping the voltage ramping signal to the first voltage when the test black voltage is being passed to the switching circuit as the test voltage, and ramping the voltage ramping signal to the second voltage when the test white voltage is being passed to the switching circuit as the test voltage.
4. An electronic device, comprising:
a pixel array including a plurality of rows with active imaging pixels, and at least one row with regulator voltage verification circuits;
wherein each of the regulator voltage verification circuits comprises:
a test voltage generation circuit configured to generate a test voltage;
a switching circuit configured to receive the test voltage and an image pixel output signal, and to pass the test voltage as output when in a test mode;
a comparison circuit configured to receive the test voltage output from the switching circuit and an analog to digital conversion signal, and to assert a counter reset signal when the output from the switching circuit and the analog to digital conversion signal are equal in voltage; and
a counter configured to begin counting at a beginning of each test cycle within the test mode, to stop counting upon assertion of the counter reset signal, and to output its count upon stopping counting;
wherein the count is proportional to the test voltage when in the test mode; and
a processor configured to receive output from the counters of the regulator voltage verification circuits, compare those outputs to expected values, and perform at least one action based upon those outputs not being within a threshold of the expected values.
5. The electronic device of claim 4 , wherein the test voltage generation circuit is configured to generate upper and lower test voltages representing upper and lower expected voltages of the image pixel output signal, respectively; wherein the test voltage generation circuit is configured to pass the upper test voltage as the test voltage in response to assertion of a multiplexer select signal, and to pass the lower test voltage as the test voltage in response to deassertion of the multiplexer select signal.
6. The electronic device of claim 5 , wherein the test voltage generation circuit comprises:
a voltage divider coupled to a reference voltage, with a first tap of the voltage divider producing the upper test voltage and a second tap of the voltage divider producing the lower test voltage; and
a multiplexer having inputs coupled to the first and second taps of the voltage divider to receive the upper and lower test voltages, and to pass the upper or lower test voltage as output based upon a logic level of the multiplexer select signal.
7. The electronic device of claim 6 , wherein the test voltage generation circuit further comprises:
a logic circuit configured to receive as input a master test mode enable signal and an individual pixel test mode enable signal, and to generate a test mode enable signal as a result of a logical operation between the master test mode enable signal and the individual pixel test mode enable signal;
a first switch selectively coupling a regulated voltage to the voltage divider in response to the test mode enable signal;
a second switch selectively shunting the voltage divider to ground in response to an inverse of the test mode enable signal; and
a third switch selectively shunting the output of the multiplexer to ground in response to the inverse of the test mode enable signal.
8. The electronic device of claim 6 , wherein the comparison circuit comprises a comparator receiving the output from the switching circuit at a first terminal through a first capacitor and the output from the analog to digital conversion signal at a second terminal through a second capacitor; and wherein the analog to digital conversion signal comprises a voltage ramping signal ramping in a repeating pattern between, in order, a base voltage, a first voltage, the base voltage, and a second voltage, with the first voltage being unequal to the second voltage, and with the first and second voltages being unequal to the base voltage.
9. The electronic device of claim 8 , wherein the ramping signal ramps to the first voltage when the multiplexer is set by the multiplexer select signal to pass the upper test voltage and ramps to the second voltage when the multiplexer is set by the multiplexer select signal to pass the lower test voltage.
10. The electronic device of claim 4 , wherein the at least one action comprises outputting commands causing a vehicle incorporating an advanced driver assistance system to provide warning to a driver that the advanced driver assistance system is malfunctioning based on determining a voltage regulator is not operating properly.
11. A method for testing a regulated voltage, comprising:
activating regulator voltage verification circuits to operate in test mode;
generating a test black voltage and a test white voltage as a function of the regulated voltage;
alternatively passing the test black voltage and the test white voltage to a switching circuit as a test voltage;
passing the test voltage from the switching circuit to a comparison circuit that asserts a counter reset signal when the test voltage and an analog to digital conversion signal are equal in voltage; and
resetting and starting a counter at a beginning of each test cycle within the test mode, stopping the counter upon assertion of the counter reset signal, and outputting a count of the counter, the count being proportional to the test voltage when in the test mode.
12. The method of claim 11 , further comprising generating the analog to digital conversion signal by generating a voltage ramping signal that ramps in a repeating pattern between, in order, a base voltage, a first voltage, the base voltage, and a second voltage; wherein the first voltage is not equal to the second voltage, and wherein the first and second voltages are not equal to the base voltage.
13. The method of claim 12 , further comprising ramping the voltage ramping signal to the first voltage when the test black voltage is being passed to the switching circuit as the test voltage, and ramping the voltage ramping signal to the second voltage when the test white voltage is being passed to the switching circuit as the test voltage.