Image sensors
An image sensor for securing an area of a photodiode includes a pixel area and a transistor area adjacent to the pixel area. The pixel area may include a photodiode and a floating diffusion area. The transistor area may include transistors extending along an edge of the pixel area. The transistors in the transistor area may include a reset transistor, one or more source follower transistors, and one or more selection transistors, and the reset transistor and one source follower transistor adjacent to the reset transistor may share a common drain area. The source follower transistors and the selection transistors may each share a common source area or a common drain area between two adjacent transistors thereof.
1. An image sensor, comprising:
a plurality of unit pixels, each unit pixel of the plurality of unit pixels including a pixel area, a transistor area, and a voltage terminal,
wherein the pixel area includes
a first photodiode,
a second photodiode,
a first transfer transistor,
a second transfer transistor, and
a floating diffusion area, the floating diffusion area shared by the first photodiode and second photodiode,
wherein the transistor area includes
a first source follower transistor,
a second source follower transistor,
a first selection transistor,
a second selection transistor, and
a first transistor, the first transistor configured to connect to the floating diffusion area,
wherein the first photodiode and the second photodiode are arranged in a first direction in a plan view,
wherein the first transfer transistor and the second transfer transistor are arranged in the first direction in the plan view,
wherein the first source follower transistor, the second source follower transistor, the first selection transistor, the second selection transistor, and the first transistor are arranged in the first direction in the plan view,
wherein a gate of the first source follower transistor is connected to a gate of the second source follower transistor,
wherein the gate of the first source follower transistor is connected to the floating diffusion area,
wherein the first source follower transistor, the first selection transistor, and the voltage terminal are connected in series, and
wherein the second source follower transistor, the second selection transistor, and the voltage terminal are connected in series.
2. The image sensor of claim 1 , wherein a distance from the first transistor to the first source follower transistor is shorter than a distance from the first transistor to the first selection transistor in the first direction in the plan view.
3. The image sensor of claim 2 , wherein the distance from the first transistor to the first source follower transistor is shorter than a distance from the first transistor to the second selection transistor in the first direction in the plan view.
4. The image sensor of claim 2 , wherein
the first photodiode has a first corner and a second corner opposite to the first corner in a second direction in the plan view,
the second photodiode has a third corner and a fourth corner opposite to the third corner in the second direction in the plan view,
the first transfer transistor is disposed on the first corner of the first photodiode and the second transfer transistor is disposed on the third corner of the second photodiode in the plan view,
a distance from the first corner of the first photodiode to the transistor area is shorter than a distance from the second corner of the first photodiode to the transistor area in the second direction in the plan view, and
the second direction is perpendicular to the first direction.
5. The image sensor of claim 4 , further comprising:
a first contact directly adjacent to the first source follower transistor; and
a second contact directly adjacent to the second source follower transistor,
wherein the first source follower transistor is configured to connect to the voltage terminal through the first contact, and
wherein the second source follower transistor is configured to connect to the voltage terminal through the second contact.
6. The image sensor of claim 5 , wherein the first transistor, the first contact, the first source follower transistor, and the first selection transistor are sequentially arranged in the first direction in the plan view.
7. The image sensor of claim 6 , further including an interconnection structure,
wherein the first source follower transistor is configured to connect to the floating diffusion area via the interconnection structure.
8. The image sensor of claim 7 , wherein
the first source follower transistor is disposed on a first side of the first selection transistor in the first direction in the plan view,
the second source follower transistor is disposed on a second side of the second selection transistor in the first direction in the plan view, and
the first side of the first selection transistor is opposite to the second side of the second selection transistor.
9. An image sensor, comprising:
a plurality of unit pixels, each unit pixel of the plurality of unit pixels including a pixel area, a transistor area, and a voltage terminal,
wherein the pixel area includes
a first photodiode,
a second photodiode, and
a floating diffusion area, the floating diffusion area shared by the first photodiode and the second photodiode,
wherein the transistor area includes
a first source follower transistor,
a second source follower transistor,
a first selection transistor,
a second selection transistor,
a first transistor, the first transistor configured to connect to the floating diffusion area and the voltage terminal,
a first impurity area between the first source follower transistor and the first selection transistor, and
a second impurity area between the second source follower transistor and the second selection transistor,
wherein the first photodiode and second photodiode are arranged in a first direction,
wherein the first source follower transistor, the second source follower transistor, the first selection transistor, the second selection transistor, and the first transistor are arranged in the first direction in a plan view,
wherein a gate of the first source follower transistor is connected to a gate of the second source follower transistor,
wherein the first source follower transistor is connected to the voltage terminal and the first selection transistor in series,
wherein the second source follower transistor is connected to the voltage terminal and the second selection transistor in series,
wherein the first source follower transistor and the first selection transistor are configured to share the first impurity area, and
wherein the second source follower transistor and the second selection transistor are configured to share the second impurity area.
10. The image sensor of claim 9 , wherein each of the first impurity area and the second impurity area is an n-type concentration impurity area.
11. The image sensor of claim 10 , wherein the first transistor, the first source follower transistor, the first impurity area, and the first selection transistor are sequentially arranged in the first direction in the plan view.
12. The image sensor of claim 10 , wherein a distance from the first transistor to the first source follower transistor is shorter than a distance from the first transistor to the second selection transistor in the first direction in the plan view.
13. The image sensor of claim 12 , wherein
the transistor area further includes a third impurity area between the first source follower transistor and the first transistor, and
the third impurity area is an n-type concentration impurity area.
14. The image sensor of claim 13 , further comprising:
a first contact configured to connect to the third impurity area and the voltage terminal.
15. The image sensor of claim 14 , further comprising:
a second contact directly adjacent to the second source follower transistor,
wherein the second source follower transistor is configured to connect to the voltage terminal through the second contact.
16. The image sensor of claim 15 , the pixel area further including:
a first transfer transistor corresponding to the first photodiode; and
a second transfer transistor corresponding to the second photodiode,
wherein the first transfer transistor and the second transfer transistor are arranged in the first direction in the plan view.
17. The image sensor of claim 16 , wherein the first transistor is configured to connect to the gate of the first source follower transistor.
18. The image sensor of claim 16 , wherein
the first source follower transistor is disposed on a first side of the first selection transistor in the first direction in the plan view,
the second source follower transistor is disposed on a second side of the second selection transistor in the first direction in the plan view, and
the first side is opposite to the second side.
19. An image sensor, comprising:
a plurality of unit pixels, each unit pixel of the plurality of unit pixels including
a first photodiode,
a second photodiode,
a floating diffusion area, the floating diffusion area shared by the first and second photodiodes,
a first source follower transistor,
a second source follower transistor,
a first selection transistor,
a second selection transistor,
a reset transistor configured to connect to the floating diffusion area and a voltage terminal,
a first n-type doping area between the first source follower transistor and the first selection transistor,
a second n-type doping area between the second source follower transistor and the second selection transistor,
a first contact configured to connect to the first n-type doping area and the voltage terminal, and
a second contact configured to connect to the second n-type doping area and the voltage terminal,
wherein the first photodiode and the second photodiode are arranged in a first direction in a plan view,
wherein the first source follower transistor, the second source follower transistor, the first selection transistor, the second selection transistor, and the reset transistor are arranged in the first direction in the plan view,
wherein a gate of the first source follower transistor is connected to a gate of the second source follower transistor,
wherein the first source follower transistor is connected to the voltage terminal and the first selection transistor in series,
wherein the second source follower transistor is connected to the voltage terminal and the second selection transistor in series,
wherein the first source follower transistor and the first selection transistor are configured to share the first n-type doping area, and
wherein the second source follower transistor and the second selection transistor are configured to share the second n-type doping area.