Resistive memory for analog computing
View Patent ↗A memory device is provided that includes a method and structure for forming a resistive memory (RRAM) which has a gradual instead of abrupt change of resistance during programming, rendering it suitable for analog computing. In a first embodiment: One electrode of the inventive RRAM comprises a metal-nitride material (e.g., titanium nitride (TiN)) with gradually changing concentration of a metal composition (e.g., titanium). Different Ti concentrations in the electrode results in different concentration of oxygen vacancy in the corresponding section of the RRAM thereby exhibiting a gradual change of resistance dependent upon an applied voltage. The total conductance of the RRAM is the sum of conductance of each section of the RRAM. In a second embodiment: a RRAM with one electrode having multiple forks of electrodes with different composition concentration and thus different switching behaviors, rendering the inventive RRAM changing conductance gradually instead of abruptly.
1. A resistive memory device comprising:
a first electrode layer having a metal containing material composition of a gradually changing percent concentration of metal material;
a resistive switching material layer having a first sidewall surface, the first sidewall surface abutting a sidewall surface of the first electrode, wherein a different height along the first sidewall surface of the resistive switching material layer abuts a respective different sidewall surface location of the first electrode layer, the first electrode layer having a respective different metal material percent concentration at a height corresponding to the respective different sidewall surface location; and
a second electrode abutting a second sidewall surface of the resistive switching material layer, the second electrode having a uniform concentration of metal material.
2. The resistive memory device of claim 1 , wherein the resistive switching material layer is a transition-metal oxide material.
3. The resistive memory device of claim 1 , wherein the first electrode layer comprises a metal-nitride material, wherein the metal containing material composition comprises a gradual percent increase of a concentration of the metal material in the first electrode layer.
4. The resistive memory device of claim 3 , connected in an addressable array of resistive memory cells having selectable wordline conductors and bitline conductors connected to circuits for programming a resistive memory cell in the array, wherein the first electrode layer electrically connects to a wordline conductor and the second electrode electrically connects to a bitline conductor.
5. The resistive memory device of claim 4 , wherein the gradual percent increase of a concentration of metal material varies vertically from a bottom to a top of said first electrode layer, said varying concentration of the composition resulting in different concentration of oxygen vacancy in a corresponding section of the memory device, and wherein a total conductance of the RRAM is the sum of conductance of each section of the RRAM, said memory device achieving a different resistance change in response to a number of pulses or level of voltage applied via a connected wordline/bitline.
6. The resistive memory device of claim 1 , further comprising:
a hardmask insulating layer formed atop a surface of the first electrode layer, said resistive switching material layer further disposed over a top surface and sidewall surface of the hardmask insulating layer.