Granted Patent B2

US 12,353,105 · App. 18/388,288 · Granted Jul 8, 2025

Inventors: Kei Takahashi (Kanagawa, JP); Susumu Kawashima (Kanagawa, JP); Koji Kusunoki (Kanagawa, JP); Kouhei Toyotaka (Kanagawa, JP); Kazunori Watanabe (Tokyo, JP)

Assignee: Semiconductor Energy Laboratory Co., Ltd.

G02F1/136286G02F1/133G02F1/1368G02F1/137G09G3/20G09G3/2085G09G3/36G09G3/3611G09G3/3648G09G3/3655G09G3/3659G02F1/13793

Abstract

Claims (42)

1. A display apparatus comprising:

a pixel array comprising a pixel; and

a source driver circuit to which an image data is input,

wherein the pixel comprises a first transistor, a second transistor, a capacitor, and a display device,

wherein one of a source and a drain of the first transistor is electrically connected to one electrode of the capacitor,

wherein the one electrode of the capacitor is electrically connected to one electrode of the display device,

wherein one of a source and a drain of the second transistor is electrically connected to another electrode of the capacitor,

wherein the another electrode of the capacitor is electrically connected to another electrode of the display device,

wherein the other of the source and the drain of the first transistor is electrically connected to a first wiring,

wherein the other of the source and the drain of the second transistor is electrically connected to a second wiring,

wherein the source driver circuit is electrically connected to the first wiring and the second wiring,

wherein the first wiring and the second wiring are electrically connected to a selection circuit in the source driver circuit,

wherein the selection circuit is electrically connected to one terminal of a first switch and one terminal of a second switch,

wherein a first potential is applied to another terminal of the first switch,

wherein a second potential is applied to another terminal of the second switch, and

wherein the first switch and the second switch are controlled to be ON or OFF in accordance with an amplitude voltage included in the image data.

2. The display apparatus according to claim 1 ,

wherein data comprising information about a most significant bit of the image data is applied to one of the first wiring and the second wiring, and

wherein data comprising information about low-order bits of the image data is applied to the other of the first wiring and the second wiring.

3. A display apparatus comprising:

a pixel array comprising a pixel; and

a source driver circuit to which an image data is input,

wherein the pixel comprises a first transistor, a second transistor, a third transistor, a capacitor, and a display device,

wherein one of a source and a drain of the first transistor is electrically connected to one electrode of the capacitor,

wherein the one electrode of the capacitor is electrically connected to one electrode of the display device,

wherein one of a source and a drain of the second transistor is electrically connected to another electrode of the capacitor,

wherein the another electrode of the capacitor is electrically connected to another electrode of the display device,

wherein one of a source and a drain of the third transistor is electrically connected to the another electrode of the capacitor,

wherein the other of the source and the drain of the first transistor is electrically connected to a first wiring,

wherein the other of the source and the drain of the second transistor is electrically connected to a second wiring,

wherein the other of the source and the drain of the third transistor is electrically connected to a third wiring,

wherein the source driver circuit is electrically connected to the first wiring and the second wiring,

wherein the first wiring and the second wiring are electrically connected to a selection circuit in the source driver circuit,

wherein the selection circuit is electrically connected to one terminal of a first switch and one terminal of a second switch,

wherein a first potential is applied to another terminal of the first switch,

wherein a second potential is applied to another terminal of the second switch, and

wherein the first switch and the second switch are controlled to be ON or OFF in accordance with an amplitude voltage included in the image data.

4. The display apparatus according to claim 3 ,

wherein data comprising information about a most significant bit of the image data is applied to one of the first wiring and the second wiring, and

wherein data comprising information about low-order bits of the image data is applied to the other of the first wiring and the second wiring.

5. The display apparatus according to claim 3 ,

wherein the third wiring is a common wiring.

Priority Claims (1)

Continuity (3)

References Cited (76)