Methods of packaging semiconductor devices and packaged semiconductor devices
Methods of packaging semiconductor devices and packaged semiconductor devices are disclosed. In some embodiments, a method of packaging a semiconductor device includes coupling through-vias to an insulating material, each of the through-vias having a first width. Dies are also coupled to the insulating material. A portion of the insulating material is removed proximate each of the through-vias. The portion of the insulating material proximate each of the through-vias removed has a second width, the second width being less than the first width.
1. A method of packaging a semiconductor device, the method comprising:
encapsulating a through via and a semiconductor die with an encapsulant;
exposing a first side of the through via and a conductive portion of the semiconductor die;
forming a redistribution layer in electrical contact with both the through via and the semiconductor die;
after the forming the redistribution layer, removing portions of a passivation layer and a protection layer to expose a second side of the through via, the second side opposite the first side, wherein the removing the portions of the passivation layer and the protection layer leaves a portion of the passivation layer over the through via; and
applying a solder paste onto the second side of the through via.
2. The method of claim 1 , wherein the removing the portions of the passivation layer and the protection layer creates a tapered sidewall.
3. The method of claim 1 , wherein the removing the portions of the passivation layer and the protection layer creates a straight sidewall.
4. The method of claim 1 , wherein the removing the portions of the passivation layer and the protection layer creates a stairstep sidewall.
5. The method of claim 1 , wherein the protection layer has a thickness of between about 1 μm to about 100 μm.
6. The method of claim 1 , wherein the through via has dimension of between about 190 μm and about 210 μm.
7. A method of packaging a semiconductor device, the method comprising:
encapsulating a through via and a semiconductor die;
after the encapsulating, exposing a first side of the through via;
forming a redistribution structure in physical contact with the first side;
forming a dielectric layer over a second side of the through via, the second side opposite the first side;
applying a protective layer over the dielectric layer, the dielectric layer in physical contact with the encapsulant at the time of the applying, the through via extending through the encapsulant, and the semiconductor die;
removing at least a portion of the protective layer and a portion of the dielectric layer to expose a second side of the through via; and
connecting a package to the second side of the through via with a solder ball.
8. The method of claim 7 , wherein the protective layer is a die attach film.
9. The method of claim 7 , wherein the protective layer has a thickness of between about 1 μm to about 100 μm.
10. The method of claim 7 , wherein the applying the protective layer is performed at least in part with a lamination process.
11. The method of claim 7 , wherein the removing at least the portion of the protective layer forms an opening, and the opening has a width that is less than a width of the through via.
12. The method of claim 7 , wherein the removing at least the portion of the protective layer is performed at least in part with a laser.
13. The method of claim 7 , wherein the removing at least the portion of the protective layer is performed at least in part with a photolithographic process.
14. The method of claim 7 , wherein the through via has dimension of between about 190 μm and about 210 μm.
15. A method of packaging a semiconductor device, the method comprising:
attaching a semiconductor die onto a dielectric layer adjacent to a through via;
encapsulating both the through via and the semiconductor die with an encapsulant;
after the encapsulating, forming a redistribution layer on a first side of the semiconductor die;
applying a protective layer in physical contact with the dielectric layer after the encapsulating;
patterning the protective layer and the dielectric layer to form an opening over the through via;
electrically connecting the though via to a package through conductive material located within the opening, the conductive material being on an opposite side of the semiconductor die from the redistribution layer; and
placing external connectors in physical contact with the redistribution layer.
16. The method of claim 15 , wherein the applying the protective layer is performed at least in part with a lamination process.
17. The method of claim 15 , wherein the patterning the protective layer and the dielectric layer is performed at least in part with a photolithography process.
18. The method of claim 15 , wherein the patterning the protective layer and the dielectric layer is performed at least in part with a laser.
19. The method of claim 15 , wherein the opening has a first width less than a second width of the through via.
20. The method of claim 19 , wherein the first width is between about 10 μm and about 350 μm.